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author | Daniel Kurtz <djkurtz@chromium.org> | 2017-04-21 14:10:18 +0800 |
---|---|---|
committer | Aaron Durbin <adurbin@chromium.org> | 2017-04-24 22:15:44 +0200 |
commit | ed644b1803a4a832ffadbe73dd957dd220d246dc (patch) | |
tree | fa29a6b056a165119bf2ac8903bbca50dd209a05 /src | |
parent | 7d4f70f76f4190303452e2f1df834229d3882741 (diff) | |
download | coreboot-ed644b1803a4a832ffadbe73dd957dd220d246dc.tar.xz |
mainboard/google/reef: Add TPM_TIS_ACPI_INTERRUPT
TPM_TIS_ACPI_INTERRUPT specifies the TPM2 ACPI interrupt used by intel's
tis_plat_irq_status() routine.
BRANCH=none
BUG=b:36786804
TEST=Boot reef w/ serial enabled firmware, verify verstage sees
"cr50 TPM".
Change-Id: Ic69add8a3ce35be64fb37db4ed40163f6144fc9c
Signed-off-by: Daniel Kurtz <djkurtz@chromium.org>
Reviewed-on: https://review.coreboot.org/19408
Reviewed-by: Julius Werner <jwerner@chromium.org>
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Tested-by: build bot (Jenkins)
Diffstat (limited to 'src')
-rw-r--r-- | src/mainboard/google/reef/Kconfig | 4 |
1 files changed, 4 insertions, 0 deletions
diff --git a/src/mainboard/google/reef/Kconfig b/src/mainboard/google/reef/Kconfig index 8fb6056050..f4e2e6a450 100644 --- a/src/mainboard/google/reef/Kconfig +++ b/src/mainboard/google/reef/Kconfig @@ -32,6 +32,10 @@ config DRIVER_TPM_I2C_ADDR hex default 0x50 +config TPM_TIS_ACPI_INTERRUPT + int + default 60 # GPE0_DW1_28 + config DRIVER_TPM_I2C_IRQ int default 60 # GPE0_DW1_28 |