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authorArthur Heymans <arthur@aheymans.xyz>2018-08-20 11:28:58 +0200
committerArthur Heymans <arthur@aheymans.xyz>2018-08-21 11:55:02 +0000
commit015339fbf0be099b37c60e4c459f9e8abe2a886e (patch)
treeee8d0257da7445f99510452fcbd9e9f450a979fc /src
parent1f6369e333cd54220ac359ea98529a028a8e9862 (diff)
downloadcoreboot-015339fbf0be099b37c60e4c459f9e8abe2a886e.tar.xz
nb/intel/pineview: Use the correct address for the RCVEN strobe
When doing the receive enable training, the final mapping of the ranks is already done, so we can be sure that that address 0x00000000 there will always be a rank. Change-Id: I7ac017a8816fc9a47cef0695826a1c32f699f6f8 Signed-off-by: Arthur Heymans <arthur@aheymans.xyz> Reviewed-on: https://review.coreboot.org/28230 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Felix Held <felix-coreboot@felixheld.de>
Diffstat (limited to 'src')
-rw-r--r--src/northbridge/intel/pineview/raminit.c4
1 files changed, 3 insertions, 1 deletions
diff --git a/src/northbridge/intel/pineview/raminit.c b/src/northbridge/intel/pineview/raminit.c
index f1e0767d9a..a050e06684 100644
--- a/src/northbridge/intel/pineview/raminit.c
+++ b/src/northbridge/intel/pineview/raminit.c
@@ -1875,7 +1875,9 @@ static void sdram_rcven(struct sysinfo *s)
u8 minbytelanecoarse = 0xff;
u8 bytelaneoffset;
u8 maxbytelane = 8;
- u32 strobeaddr = (rank_is_populated(s->dimms, 0, 0)) ? 0 : 2*128*1024*1024;
+ /* Since dra/drb is already set up we know that at address 0x00000000
+ we will always find the first available rank */
+ u32 strobeaddr = 0;
u32 dqshighaddr;
MCHBAR8(0x5d8) = MCHBAR8(0x5d8) & ~0xc;