summaryrefslogtreecommitdiff
path: root/src
diff options
context:
space:
mode:
authorDamien Zammit <damien@zamaudio.com>2016-01-26 14:06:26 +1100
committerMartin Roth <martinroth@google.com>2016-02-09 18:22:33 +0100
commit08ec1ae2c2e3be36e08d019719691d30f1106c87 (patch)
tree8f0741ffe7f9a5e10c0c1ab2c6543e603299bdaa /src
parentf2ad50fedad9a412c9e9600b79ec2c68c63242e2 (diff)
downloadcoreboot-08ec1ae2c2e3be36e08d019719691d30f1106c87.tar.xz
mb/intel/d510mo: Explicitly select NIC on PCI in devicetree
While the board configuration still works without this, It's nicer to have the device statically defined since the NIC is hardwired to the board. Change-Id: Ic6682865dd17672c3782bfba9511cd120d1657c1 Signed-off-by: Damien Zammit <damien@zamaudio.com> Reviewed-on: https://review.coreboot.org/13455 Tested-by: build bot (Jenkins) Reviewed-by: Martin Roth <martinroth@google.com>
Diffstat (limited to 'src')
-rw-r--r--src/mainboard/intel/d510mo/devicetree.cb4
1 files changed, 3 insertions, 1 deletions
diff --git a/src/mainboard/intel/d510mo/devicetree.cb b/src/mainboard/intel/d510mo/devicetree.cb
index c0f38de9dd..c5b885ff85 100644
--- a/src/mainboard/intel/d510mo/devicetree.cb
+++ b/src/mainboard/intel/d510mo/devicetree.cb
@@ -43,7 +43,9 @@ chip northbridge/intel/pineview # Northbridge
register "gpe0_en" = "0x20000040"
device pci 1b.0 on end # Audio
- device pci 1c.0 on end # PCIe 1
+ device pci 1c.0 on # PCIe 1
+ device pci 0.0 on end # NIC
+ end
device pci 1c.1 on end # PCIe 2
device pci 1c.2 on end # PCIe 3
device pci 1c.3 on end # PCIe 4