diff options
author | Ronald G. Minnich <rminnich@gmail.com> | 2006-05-05 03:54:31 +0000 |
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committer | Ronald G. Minnich <rminnich@gmail.com> | 2006-05-05 03:54:31 +0000 |
commit | 1656c18d76773afe2b48dd8bf29d8f4e0b40d6ba (patch) | |
tree | 17286a4575baf631e024b4251a9694d2030a92f9 /src | |
parent | 070a10f7593014f1ae8a0f15d34293f59790f9cf (diff) | |
download | coreboot-1656c18d76773afe2b48dd8bf29d8f4e0b40d6ba.tar.xz |
reorder early startup so that it might work.
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2298 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
Diffstat (limited to 'src')
-rw-r--r-- | src/mainboard/olpc/rev_a/auto.c | 8 | ||||
-rw-r--r-- | src/southbridge/amd/cs5536/cs5536_early_setup.c | 16 |
2 files changed, 16 insertions, 8 deletions
diff --git a/src/mainboard/olpc/rev_a/auto.c b/src/mainboard/olpc/rev_a/auto.c index 06c235bf66..65c87103c1 100644 --- a/src/mainboard/olpc/rev_a/auto.c +++ b/src/mainboard/olpc/rev_a/auto.c @@ -157,12 +157,16 @@ static void main(unsigned long bist) SystemPreInit(); msr_init(); + cs5536_early_setup(); + + /* NOTE: must do this AFTER the early_setup! + * it is counting on some early MSR setup + * for cs5536 + */ cs5536_setup_onchipuart(); uart_init(); console_init(); - cs5536_early_setup(); - pll_reset(); cpuRegInit(); diff --git a/src/southbridge/amd/cs5536/cs5536_early_setup.c b/src/southbridge/amd/cs5536/cs5536_early_setup.c index bf77087a47..710adccf7c 100644 --- a/src/southbridge/amd/cs5536/cs5536_early_setup.c +++ b/src/southbridge/amd/cs5536/cs5536_early_setup.c @@ -232,6 +232,10 @@ static int cs5536_setup_onchipuart(void) wrmsr(MDD_LEG_IO,msr); } +/* note: you can't do prints in here in most cases, + * and we don't want to hang on serial, so they are + * commented out + */ static int cs5536_early_setup(void) { msr_t msr; @@ -241,19 +245,19 @@ static int cs5536_early_setup(void) msr = rdmsr(GLCP_SYS_RSTPLL); if (msr.lo & (0x3f << 26)) { /* PLL is already set and we are reboot from PLL reset */ - print_debug("reboot from BIOS reset\n\r"); + //print_debug("reboot from BIOS reset\n\r"); return; } - print_debug("Setup idsel\r\n"); + //print_debug("Setup idsel\r\n"); cs5536_setup_idsel(); - print_debug("Setup iobase\r\n"); + //print_debug("Setup iobase\r\n"); cs5536_usb_swapsif(); cs5536_setup_iobase(); - print_debug("Setup gpio\r\n"); + //print_debug("Setup gpio\r\n"); cs5536_setup_gpio(); - print_debug("Setup cis_mode\r\n"); + //print_debug("Setup cis_mode\r\n"); cs5536_setup_cis_mode(); - print_debug("Setup smbus\r\n"); + //print_debug("Setup smbus\r\n"); cs5536_enable_smbus(); dummy(); } |