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authorPatrick Rudolph <siro@das-labor.org>2015-07-12 17:06:41 +0200
committerStefan Reinauer <stefan.reinauer@coreboot.org>2015-07-13 02:01:04 +0200
commit2b374beebc4985376d7c6ee34dd678d74404eb32 (patch)
treeb5c7b6765dae0e397dd149c42ec043a601c9c4f5 /src
parent6f7ce9b2172297b56c4b255a1c322b576a4583b8 (diff)
downloadcoreboot-2b374beebc4985376d7c6ee34dd678d74404eb32.tar.xz
intel raminit: improve logging
Print the old timB value to observes changes made. Change-Id: Iecec4918f1d95560b6e7933a169ccce83fcf073d Signed-off-by: Patrick Rudolph <siro@das-labor.org> Reviewed-on: http://review.coreboot.org/10891 Tested-by: build bot (Jenkins) Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net> Reviewed-by: Nicolas Reinecke <nr@das-labor.org>
Diffstat (limited to 'src')
-rw-r--r--src/northbridge/intel/sandybridge/raminit_native.c7
1 files changed, 4 insertions, 3 deletions
diff --git a/src/northbridge/intel/sandybridge/raminit_native.c b/src/northbridge/intel/sandybridge/raminit_native.c
index 982a03d4e8..850ce93ed2 100644
--- a/src/northbridge/intel/sandybridge/raminit_native.c
+++ b/src/northbridge/intel/sandybridge/raminit_native.c
@@ -2305,7 +2305,7 @@ static int get_timB_high_adjust(u64 val)
static void adjust_high_timB(ramctr_timing * ctrl)
{
- int channel, slotrank, lane;
+ int channel, slotrank, lane, old;
write32(DEFAULT_MCHBAR + 0x3400, 0x200);
FOR_ALL_POPULATED_CHANNELS {
fill_pattern1(ctrl, channel);
@@ -2380,12 +2380,13 @@ static void adjust_high_timB(ramctr_timing * ctrl)
res |=
((u64) read32(DEFAULT_MCHBAR + lane_registers[lane] +
0x100 * channel + 8)) << 32;
+ old = ctrl->timings[channel][slotrank].lanes[lane].timB;
ctrl->timings[channel][slotrank].lanes[lane].timB +=
get_timB_high_adjust(res) * 64;
printk(BIOS_DEBUG, "High adjust %d:%016llx\n", lane, res);
- printram("Bval+: %d, %d, %d, %x\n", channel,
- slotrank, lane,
+ printram("Bval+: %d, %d, %d, %x -> %x\n", channel,
+ slotrank, lane, old,
ctrl->timings[channel][slotrank].lanes[lane].
timB);
}