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authorKyösti Mälkki <kyosti.malkki@gmail.com>2014-10-21 13:43:46 +0300
committerKyösti Mälkki <kyosti.malkki@gmail.com>2014-12-03 08:09:05 +0100
commit34ad72cd03923461d1a2cd80c798002e94f92069 (patch)
tree186b29a3d08d05798d8f3bb8f430e5af5b7df5c2 /src
parent4b5a71179a089dc1c1cdea263c3169a421eff139 (diff)
downloadcoreboot-34ad72cd03923461d1a2cd80c798002e94f92069.tar.xz
AGESA: Remove duplicate OemCustomizeInitEarly declarations
Change-Id: I59b2c3f235a6b30e68e78c2fe4065fbc0488bc4c Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com> Reviewed-on: http://review.coreboot.org/7158 Reviewed-by: Edward O'Callaghan <eocallaghan@alterapraxis.com> Tested-by: build bot (Jenkins)
Diffstat (limited to 'src')
-rw-r--r--src/mainboard/amd/inagua/PlatformGnbPcie.c1
-rw-r--r--src/mainboard/amd/inagua/PlatformGnbPcieComplex.h2
-rw-r--r--src/mainboard/amd/olivehill/PlatformGnbPcie.c3
-rw-r--r--src/mainboard/amd/olivehill/PlatformGnbPcieComplex.h32
-rw-r--r--src/mainboard/amd/parmer/PlatformGnbPcie.c3
-rw-r--r--src/mainboard/amd/parmer/PlatformGnbPcieComplex.h32
-rw-r--r--src/mainboard/amd/persimmon/PlatformGnbPcie.c1
-rw-r--r--src/mainboard/amd/persimmon/PlatformGnbPcieComplex.h4
-rw-r--r--src/mainboard/amd/south_station/PlatformGnbPcie.c1
-rw-r--r--src/mainboard/amd/south_station/PlatformGnbPcieComplex.h4
-rw-r--r--src/mainboard/amd/thatcher/PlatformGnbPcie.c3
-rw-r--r--src/mainboard/amd/thatcher/PlatformGnbPcieComplex.h32
-rw-r--r--src/mainboard/amd/torpedo/PlatformGnbPcie.c1
-rw-r--r--src/mainboard/amd/torpedo/PlatformGnbPcieComplex.h4
-rw-r--r--src/mainboard/amd/union_station/PlatformGnbPcie.c1
-rw-r--r--src/mainboard/amd/union_station/PlatformGnbPcieComplex.h4
-rw-r--r--src/mainboard/asrock/e350m1/PlatformGnbPcie.c1
-rw-r--r--src/mainboard/asrock/e350m1/PlatformGnbPcieComplex.h4
-rw-r--r--src/mainboard/asrock/imb-a180/PlatformGnbPcie.c3
-rw-r--r--src/mainboard/asrock/imb-a180/PlatformGnbPcieComplex.h32
-rw-r--r--src/mainboard/asus/f2a85-m/PlatformGnbPcie.c5
-rw-r--r--src/mainboard/asus/f2a85-m/PlatformGnbPcieComplex.h31
-rw-r--r--src/mainboard/gizmosphere/gizmo/PlatformGnbPcie.c1
-rw-r--r--src/mainboard/gizmosphere/gizmo/PlatformGnbPcieComplex.h4
-rw-r--r--src/mainboard/hp/pavilion_m6_1035dx/PlatformGnbPcie.c5
-rw-r--r--src/mainboard/hp/pavilion_m6_1035dx/PlatformGnbPcieComplex.h31
-rw-r--r--src/mainboard/jetway/nf81-t56n-lf/PlatformGnbPcie.c1
-rw-r--r--src/mainboard/jetway/nf81-t56n-lf/PlatformGnbPcieComplex.h2
-rw-r--r--src/mainboard/lenovo/g505s/PlatformGnbPcie.c5
-rw-r--r--src/mainboard/lenovo/g505s/PlatformGnbPcieComplex.h31
-rw-r--r--src/mainboard/lippert/frontrunner-af/PlatformGnbPcie.c1
-rw-r--r--src/mainboard/lippert/frontrunner-af/PlatformGnbPcieComplex.h4
-rw-r--r--src/mainboard/lippert/toucan-af/PlatformGnbPcie.c1
-rw-r--r--src/mainboard/lippert/toucan-af/PlatformGnbPcieComplex.h4
-rw-r--r--src/northbridge/amd/agesa/agesawrapper.h3
-rw-r--r--src/northbridge/amd/agesa/family12/agesawrapper.c2
-rw-r--r--src/northbridge/amd/agesa/family14/agesawrapper.c2
-rw-r--r--src/northbridge/amd/agesa/family15/agesawrapper.c4
-rw-r--r--src/northbridge/amd/agesa/family15rl/agesawrapper.c2
-rw-r--r--src/northbridge/amd/agesa/family15tn/agesawrapper.c2
-rw-r--r--src/northbridge/amd/agesa/family16kb/agesawrapper.c2
41 files changed, 35 insertions, 276 deletions
diff --git a/src/mainboard/amd/inagua/PlatformGnbPcie.c b/src/mainboard/amd/inagua/PlatformGnbPcie.c
index 08cd998c11..4e8e15f41e 100644
--- a/src/mainboard/amd/inagua/PlatformGnbPcie.c
+++ b/src/mainboard/amd/inagua/PlatformGnbPcie.c
@@ -20,6 +20,7 @@
#include "PlatformGnbPcieComplex.h"
#include <string.h>
+#include <northbridge/amd/agesa/agesawrapper.h>
#include <vendorcode/amd/agesa/f14/Proc/CPU/heapManager.h>
#define FILECODE PROC_RECOVERY_MEM_NB_ON_MRNON_FILECODE
diff --git a/src/mainboard/amd/inagua/PlatformGnbPcieComplex.h b/src/mainboard/amd/inagua/PlatformGnbPcieComplex.h
index 111ad6fbbd..0b93d9ce40 100644
--- a/src/mainboard/amd/inagua/PlatformGnbPcieComplex.h
+++ b/src/mainboard/amd/inagua/PlatformGnbPcieComplex.h
@@ -64,6 +64,4 @@
//3:Half-swing(-3.5db) 4:extended length (-6db) 5:extended length(-8db)
#define GNB_GPP_PORT8_HOTPLUG_SUPPORT 0 //0:Disable 1:Basic 3:Enhanced
-VOID OemCustomizeInitEarly(IN OUT AMD_EARLY_PARAMS *InitEarly);
-
#endif //_PLATFORM_GNB_PCIE_COMPLEX_H
diff --git a/src/mainboard/amd/olivehill/PlatformGnbPcie.c b/src/mainboard/amd/olivehill/PlatformGnbPcie.c
index 0775ad3830..903d1bb596 100644
--- a/src/mainboard/amd/olivehill/PlatformGnbPcie.c
+++ b/src/mainboard/amd/olivehill/PlatformGnbPcie.c
@@ -21,9 +21,10 @@
#include "amdlib.h"
#include "Ids.h"
#include "heapManager.h"
-#include "PlatformGnbPcieComplex.h"
#include "Filecode.h"
+#include <northbridge/amd/agesa/agesawrapper.h>
+
#define FILECODE PROC_GNB_PCIE_FAMILY_0X15_F15PCIECOMPLEXCONFIG_FILECODE
static const PCIe_PORT_DESCRIPTOR PortList [] = {
diff --git a/src/mainboard/amd/olivehill/PlatformGnbPcieComplex.h b/src/mainboard/amd/olivehill/PlatformGnbPcieComplex.h
deleted file mode 100644
index b3c69cfc9b..0000000000
--- a/src/mainboard/amd/olivehill/PlatformGnbPcieComplex.h
+++ /dev/null
@@ -1,32 +0,0 @@
-/*
- * This file is part of the coreboot project.
- *
- * Copyright (C) 2012 Advanced Micro Devices, Inc.
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; version 2 of the License.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
- */
-
-#ifndef _PLATFORM_GNB_PCIE_COMPLEX_H
-#define _PLATFORM_GNB_PCIE_COMPLEX_H
-
-#include "Porting.h"
-#include "AGESA.h"
-#include "amdlib.h"
-
-VOID
-OemCustomizeInitEarly (
- IN OUT AMD_EARLY_PARAMS *InitEarly
- );
-
-#endif //_PLATFORM_GNB_PCIE_COMPLEX_H
diff --git a/src/mainboard/amd/parmer/PlatformGnbPcie.c b/src/mainboard/amd/parmer/PlatformGnbPcie.c
index 784f6d9114..50f8be5efa 100644
--- a/src/mainboard/amd/parmer/PlatformGnbPcie.c
+++ b/src/mainboard/amd/parmer/PlatformGnbPcie.c
@@ -21,9 +21,10 @@
#include "amdlib.h"
#include "Ids.h"
#include "heapManager.h"
-#include "PlatformGnbPcieComplex.h"
#include "Filecode.h"
+#include <northbridge/amd/agesa/agesawrapper.h>
+
#define FILECODE PROC_GNB_PCIE_FAMILY_0X15_F15PCIECOMPLEXCONFIG_FILECODE
/*
diff --git a/src/mainboard/amd/parmer/PlatformGnbPcieComplex.h b/src/mainboard/amd/parmer/PlatformGnbPcieComplex.h
deleted file mode 100644
index b3c69cfc9b..0000000000
--- a/src/mainboard/amd/parmer/PlatformGnbPcieComplex.h
+++ /dev/null
@@ -1,32 +0,0 @@
-/*
- * This file is part of the coreboot project.
- *
- * Copyright (C) 2012 Advanced Micro Devices, Inc.
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; version 2 of the License.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
- */
-
-#ifndef _PLATFORM_GNB_PCIE_COMPLEX_H
-#define _PLATFORM_GNB_PCIE_COMPLEX_H
-
-#include "Porting.h"
-#include "AGESA.h"
-#include "amdlib.h"
-
-VOID
-OemCustomizeInitEarly (
- IN OUT AMD_EARLY_PARAMS *InitEarly
- );
-
-#endif //_PLATFORM_GNB_PCIE_COMPLEX_H
diff --git a/src/mainboard/amd/persimmon/PlatformGnbPcie.c b/src/mainboard/amd/persimmon/PlatformGnbPcie.c
index de797c0c61..0ecc4f17e6 100644
--- a/src/mainboard/amd/persimmon/PlatformGnbPcie.c
+++ b/src/mainboard/amd/persimmon/PlatformGnbPcie.c
@@ -20,6 +20,7 @@
#include "PlatformGnbPcieComplex.h"
#include <string.h>
+#include <northbridge/amd/agesa/agesawrapper.h>
#include <vendorcode/amd/agesa/f14/Proc/CPU/heapManager.h>
#define FILECODE PROC_RECOVERY_MEM_NB_ON_MRNON_FILECODE
diff --git a/src/mainboard/amd/persimmon/PlatformGnbPcieComplex.h b/src/mainboard/amd/persimmon/PlatformGnbPcieComplex.h
index ec8a6e3648..4a01875920 100644
--- a/src/mainboard/amd/persimmon/PlatformGnbPcieComplex.h
+++ b/src/mainboard/amd/persimmon/PlatformGnbPcieComplex.h
@@ -65,9 +65,5 @@
//3:Half-swing(-3.5db) 4:extended length (-6db) 5:extended length(-8db)
#define GNB_GPP_PORT8_HOTPLUG_SUPPORT 0 //0:Disable 1:Basic 3:Enhanced
-VOID
-OemCustomizeInitEarly (
- IN OUT AMD_EARLY_PARAMS *InitEarly
- );
#endif //_PLATFORM_GNB_PCIE_COMPLEX_H
diff --git a/src/mainboard/amd/south_station/PlatformGnbPcie.c b/src/mainboard/amd/south_station/PlatformGnbPcie.c
index 3798251e1f..884d813a6b 100644
--- a/src/mainboard/amd/south_station/PlatformGnbPcie.c
+++ b/src/mainboard/amd/south_station/PlatformGnbPcie.c
@@ -20,6 +20,7 @@
#include "PlatformGnbPcieComplex.h"
#include <string.h>
+#include <northbridge/amd/agesa/agesawrapper.h>
#include <vendorcode/amd/agesa/f14/Proc/CPU/heapManager.h>
#define FILECODE PROC_RECOVERY_MEM_NB_ON_MRNON_FILECODE
diff --git a/src/mainboard/amd/south_station/PlatformGnbPcieComplex.h b/src/mainboard/amd/south_station/PlatformGnbPcieComplex.h
index 5efcd7da95..8660e0ad6b 100644
--- a/src/mainboard/amd/south_station/PlatformGnbPcieComplex.h
+++ b/src/mainboard/amd/south_station/PlatformGnbPcieComplex.h
@@ -64,9 +64,5 @@
//3:Half-swing(-3.5db) 4:extended length (-6db) 5:extended length(-8db)
#define GNB_GPP_PORT8_HOTPLUG_SUPPORT 0 //0:Disable 1:Basic 3:Enhanced
-VOID
-OemCustomizeInitEarly (
- IN OUT AMD_EARLY_PARAMS *InitEarly
- );
#endif //_PLATFORM_GNB_PCIE_COMPLEX_H
diff --git a/src/mainboard/amd/thatcher/PlatformGnbPcie.c b/src/mainboard/amd/thatcher/PlatformGnbPcie.c
index 4072112c5f..58cc105a2f 100644
--- a/src/mainboard/amd/thatcher/PlatformGnbPcie.c
+++ b/src/mainboard/amd/thatcher/PlatformGnbPcie.c
@@ -21,9 +21,10 @@
#include "amdlib.h"
#include "Ids.h"
#include "heapManager.h"
-#include "PlatformGnbPcieComplex.h"
#include "Filecode.h"
+#include <northbridge/amd/agesa/agesawrapper.h>
+
#define FILECODE PROC_GNB_PCIE_FAMILY_0X15_F15PCIECOMPLEXCONFIG_FILECODE
/*
diff --git a/src/mainboard/amd/thatcher/PlatformGnbPcieComplex.h b/src/mainboard/amd/thatcher/PlatformGnbPcieComplex.h
deleted file mode 100644
index b3c69cfc9b..0000000000
--- a/src/mainboard/amd/thatcher/PlatformGnbPcieComplex.h
+++ /dev/null
@@ -1,32 +0,0 @@
-/*
- * This file is part of the coreboot project.
- *
- * Copyright (C) 2012 Advanced Micro Devices, Inc.
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; version 2 of the License.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
- */
-
-#ifndef _PLATFORM_GNB_PCIE_COMPLEX_H
-#define _PLATFORM_GNB_PCIE_COMPLEX_H
-
-#include "Porting.h"
-#include "AGESA.h"
-#include "amdlib.h"
-
-VOID
-OemCustomizeInitEarly (
- IN OUT AMD_EARLY_PARAMS *InitEarly
- );
-
-#endif //_PLATFORM_GNB_PCIE_COMPLEX_H
diff --git a/src/mainboard/amd/torpedo/PlatformGnbPcie.c b/src/mainboard/amd/torpedo/PlatformGnbPcie.c
index a17a7ed53a..f8ad709606 100644
--- a/src/mainboard/amd/torpedo/PlatformGnbPcie.c
+++ b/src/mainboard/amd/torpedo/PlatformGnbPcie.c
@@ -20,6 +20,7 @@
#include "PlatformGnbPcieComplex.h"
#include <string.h>
+#include <northbridge/amd/agesa/agesawrapper.h>
#include <vendorcode/amd/agesa/f12/Proc/CPU/heapManager.h>
#define FILECODE PROC_GNB_PCIE_FAMILY_0X12_F12PCIECOMPLEXCONFIG_FILECODE
diff --git a/src/mainboard/amd/torpedo/PlatformGnbPcieComplex.h b/src/mainboard/amd/torpedo/PlatformGnbPcieComplex.h
index 5efcd7da95..8660e0ad6b 100644
--- a/src/mainboard/amd/torpedo/PlatformGnbPcieComplex.h
+++ b/src/mainboard/amd/torpedo/PlatformGnbPcieComplex.h
@@ -64,9 +64,5 @@
//3:Half-swing(-3.5db) 4:extended length (-6db) 5:extended length(-8db)
#define GNB_GPP_PORT8_HOTPLUG_SUPPORT 0 //0:Disable 1:Basic 3:Enhanced
-VOID
-OemCustomizeInitEarly (
- IN OUT AMD_EARLY_PARAMS *InitEarly
- );
#endif //_PLATFORM_GNB_PCIE_COMPLEX_H
diff --git a/src/mainboard/amd/union_station/PlatformGnbPcie.c b/src/mainboard/amd/union_station/PlatformGnbPcie.c
index aa0eedbbf5..12ded1eb30 100644
--- a/src/mainboard/amd/union_station/PlatformGnbPcie.c
+++ b/src/mainboard/amd/union_station/PlatformGnbPcie.c
@@ -25,6 +25,7 @@
#include "Filecode.h"
#include <string.h>
+#include <northbridge/amd/agesa/agesawrapper.h>
#define FILECODE PROC_RECOVERY_MEM_NB_ON_MRNON_FILECODE
diff --git a/src/mainboard/amd/union_station/PlatformGnbPcieComplex.h b/src/mainboard/amd/union_station/PlatformGnbPcieComplex.h
index 5efcd7da95..8660e0ad6b 100644
--- a/src/mainboard/amd/union_station/PlatformGnbPcieComplex.h
+++ b/src/mainboard/amd/union_station/PlatformGnbPcieComplex.h
@@ -64,9 +64,5 @@
//3:Half-swing(-3.5db) 4:extended length (-6db) 5:extended length(-8db)
#define GNB_GPP_PORT8_HOTPLUG_SUPPORT 0 //0:Disable 1:Basic 3:Enhanced
-VOID
-OemCustomizeInitEarly (
- IN OUT AMD_EARLY_PARAMS *InitEarly
- );
#endif //_PLATFORM_GNB_PCIE_COMPLEX_H
diff --git a/src/mainboard/asrock/e350m1/PlatformGnbPcie.c b/src/mainboard/asrock/e350m1/PlatformGnbPcie.c
index eefd27fe3b..9f6af529a9 100644
--- a/src/mainboard/asrock/e350m1/PlatformGnbPcie.c
+++ b/src/mainboard/asrock/e350m1/PlatformGnbPcie.c
@@ -25,6 +25,7 @@
#include "Filecode.h"
#include <string.h>
+#include <northbridge/amd/agesa/agesawrapper.h>
#define FILECODE PROC_RECOVERY_MEM_NB_ON_MRNON_FILECODE
diff --git a/src/mainboard/asrock/e350m1/PlatformGnbPcieComplex.h b/src/mainboard/asrock/e350m1/PlatformGnbPcieComplex.h
index 5efcd7da95..8660e0ad6b 100644
--- a/src/mainboard/asrock/e350m1/PlatformGnbPcieComplex.h
+++ b/src/mainboard/asrock/e350m1/PlatformGnbPcieComplex.h
@@ -64,9 +64,5 @@
//3:Half-swing(-3.5db) 4:extended length (-6db) 5:extended length(-8db)
#define GNB_GPP_PORT8_HOTPLUG_SUPPORT 0 //0:Disable 1:Basic 3:Enhanced
-VOID
-OemCustomizeInitEarly (
- IN OUT AMD_EARLY_PARAMS *InitEarly
- );
#endif //_PLATFORM_GNB_PCIE_COMPLEX_H
diff --git a/src/mainboard/asrock/imb-a180/PlatformGnbPcie.c b/src/mainboard/asrock/imb-a180/PlatformGnbPcie.c
index 24d838152c..75fb0c2334 100644
--- a/src/mainboard/asrock/imb-a180/PlatformGnbPcie.c
+++ b/src/mainboard/asrock/imb-a180/PlatformGnbPcie.c
@@ -21,9 +21,10 @@
#include "amdlib.h"
#include "Ids.h"
#include "heapManager.h"
-#include "PlatformGnbPcieComplex.h"
#include "Filecode.h"
+#include <northbridge/amd/agesa/agesawrapper.h>
+
#define FILECODE PROC_GNB_PCIE_FAMILY_0X15_F15PCIECOMPLEXCONFIG_FILECODE
static const PCIe_PORT_DESCRIPTOR PortList [] = {
diff --git a/src/mainboard/asrock/imb-a180/PlatformGnbPcieComplex.h b/src/mainboard/asrock/imb-a180/PlatformGnbPcieComplex.h
deleted file mode 100644
index 1db8b2dd81..0000000000
--- a/src/mainboard/asrock/imb-a180/PlatformGnbPcieComplex.h
+++ /dev/null
@@ -1,32 +0,0 @@
-/*
- * This file is part of the coreboot project.
- *
- * Copyright (C) 2012 Advanced Micro Devices, Inc.
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; version 2 of the License.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
- */
-
-#ifndef _PLATFORM_GNB_PCIE_COMPLEX_H
-#define _PLATFORM_GNB_PCIE_COMPLEX_H
-
-#include "Porting.h"
-#include "AGESA.h"
-#include "amdlib.h"
-
-VOID
-OemCustomizeInitEarly (
- IN OUT AMD_EARLY_PARAMS *InitEarly
- );
-
-#endif //_PLATFORM_GNB_PCIE_COMPLEX_H
diff --git a/src/mainboard/asus/f2a85-m/PlatformGnbPcie.c b/src/mainboard/asus/f2a85-m/PlatformGnbPcie.c
index 3a8be411e8..91b5028dd2 100644
--- a/src/mainboard/asus/f2a85-m/PlatformGnbPcie.c
+++ b/src/mainboard/asus/f2a85-m/PlatformGnbPcie.c
@@ -17,8 +17,11 @@
* Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
*/
-#include "PlatformGnbPcieComplex.h"
+#include "Porting.h"
+#include "AGESA.h"
+#include "amdlib.h"
+#include <northbridge/amd/agesa/agesawrapper.h>
#include <vendorcode/amd/agesa/f15tn/Proc/CPU/heapManager.h>
#define FILECODE PROC_GNB_PCIE_FAMILY_0X15_F15PCIECOMPLEXCONFIG_FILECODE
diff --git a/src/mainboard/asus/f2a85-m/PlatformGnbPcieComplex.h b/src/mainboard/asus/f2a85-m/PlatformGnbPcieComplex.h
deleted file mode 100644
index add900853a..0000000000
--- a/src/mainboard/asus/f2a85-m/PlatformGnbPcieComplex.h
+++ /dev/null
@@ -1,31 +0,0 @@
-/*
- * This file is part of the coreboot project.
- *
- * Copyright (C) 2012 Advanced Micro Devices, Inc.
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; version 2 of the License.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
- */
-
-#ifndef _PLATFORM_GNB_PCIE_COMPLEX_H
-#define _PLATFORM_GNB_PCIE_COMPLEX_H
-
-#include <vendorcode/amd/agesa/f15tn/AGESA.h>
-#include <vendorcode/amd/agesa/f15tn/Lib/amdlib.h>
-
-VOID
-OemCustomizeInitEarly (
- IN OUT AMD_EARLY_PARAMS *InitEarly
- );
-
-#endif //_PLATFORM_GNB_PCIE_COMPLEX_H
diff --git a/src/mainboard/gizmosphere/gizmo/PlatformGnbPcie.c b/src/mainboard/gizmosphere/gizmo/PlatformGnbPcie.c
index cc4bbfbe96..00bd809b71 100644
--- a/src/mainboard/gizmosphere/gizmo/PlatformGnbPcie.c
+++ b/src/mainboard/gizmosphere/gizmo/PlatformGnbPcie.c
@@ -26,6 +26,7 @@
#include "Filecode.h"
#include <string.h>
+#include <northbridge/amd/agesa/agesawrapper.h>
/*---------------------------------------------------------------------------------------*/
/**
diff --git a/src/mainboard/gizmosphere/gizmo/PlatformGnbPcieComplex.h b/src/mainboard/gizmosphere/gizmo/PlatformGnbPcieComplex.h
index 5cd4b41a03..88dc25b453 100644
--- a/src/mainboard/gizmosphere/gizmo/PlatformGnbPcieComplex.h
+++ b/src/mainboard/gizmosphere/gizmo/PlatformGnbPcieComplex.h
@@ -66,9 +66,5 @@
//3:Half-swing(-3.5db) 4:extended length (-6db) 5:extended length(-8db)
#define GNB_GPP_PORT8_HOTPLUG_SUPPORT 0 //0:Disable 1:Basic 3:Enhanced
-VOID
-OemCustomizeInitEarly (
- IN OUT AMD_EARLY_PARAMS *InitEarly
- );
#endif //_PLATFORM_GNB_PCIE_COMPLEX_H
diff --git a/src/mainboard/hp/pavilion_m6_1035dx/PlatformGnbPcie.c b/src/mainboard/hp/pavilion_m6_1035dx/PlatformGnbPcie.c
index de046ace38..378b48f63e 100644
--- a/src/mainboard/hp/pavilion_m6_1035dx/PlatformGnbPcie.c
+++ b/src/mainboard/hp/pavilion_m6_1035dx/PlatformGnbPcie.c
@@ -17,8 +17,11 @@
* Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
*/
-#include "PlatformGnbPcieComplex.h"
+#include "Porting.h"
+#include "AGESA.h"
+#include "amdlib.h"
+#include <northbridge/amd/agesa/agesawrapper.h>
#include <vendorcode/amd/agesa/f15tn/Proc/CPU/heapManager.h>
#define FILECODE PROC_GNB_PCIE_FAMILY_0X15_F15PCIECOMPLEXCONFIG_FILECODE
diff --git a/src/mainboard/hp/pavilion_m6_1035dx/PlatformGnbPcieComplex.h b/src/mainboard/hp/pavilion_m6_1035dx/PlatformGnbPcieComplex.h
deleted file mode 100644
index add900853a..0000000000
--- a/src/mainboard/hp/pavilion_m6_1035dx/PlatformGnbPcieComplex.h
+++ /dev/null
@@ -1,31 +0,0 @@
-/*
- * This file is part of the coreboot project.
- *
- * Copyright (C) 2012 Advanced Micro Devices, Inc.
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; version 2 of the License.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
- */
-
-#ifndef _PLATFORM_GNB_PCIE_COMPLEX_H
-#define _PLATFORM_GNB_PCIE_COMPLEX_H
-
-#include <vendorcode/amd/agesa/f15tn/AGESA.h>
-#include <vendorcode/amd/agesa/f15tn/Lib/amdlib.h>
-
-VOID
-OemCustomizeInitEarly (
- IN OUT AMD_EARLY_PARAMS *InitEarly
- );
-
-#endif //_PLATFORM_GNB_PCIE_COMPLEX_H
diff --git a/src/mainboard/jetway/nf81-t56n-lf/PlatformGnbPcie.c b/src/mainboard/jetway/nf81-t56n-lf/PlatformGnbPcie.c
index ad4934e348..cdeca0bf08 100644
--- a/src/mainboard/jetway/nf81-t56n-lf/PlatformGnbPcie.c
+++ b/src/mainboard/jetway/nf81-t56n-lf/PlatformGnbPcie.c
@@ -21,6 +21,7 @@
#include "PlatformGnbPcieComplex.h"
#include <string.h>
+#include <northbridge/amd/agesa/agesawrapper.h>
#include <vendorcode/amd/agesa/f14/Proc/CPU/heapManager.h>
#define FILECODE PROC_RECOVERY_MEM_NB_ON_MRNON_FILECODE
diff --git a/src/mainboard/jetway/nf81-t56n-lf/PlatformGnbPcieComplex.h b/src/mainboard/jetway/nf81-t56n-lf/PlatformGnbPcieComplex.h
index dd6f7d7c7d..0d1738edac 100644
--- a/src/mainboard/jetway/nf81-t56n-lf/PlatformGnbPcieComplex.h
+++ b/src/mainboard/jetway/nf81-t56n-lf/PlatformGnbPcieComplex.h
@@ -79,6 +79,4 @@
#define GNB_GPP_PORT8_CHANNEL_TYPE 4
#define GNB_GPP_PORT8_HOTPLUG_SUPPORT 0
-void OemCustomizeInitEarly (IN OUT AMD_EARLY_PARAMS *InitEarly);
-
#endif /* _PLATFORM_GNB_PCIE_COMPLEX_H */
diff --git a/src/mainboard/lenovo/g505s/PlatformGnbPcie.c b/src/mainboard/lenovo/g505s/PlatformGnbPcie.c
index de046ace38..378b48f63e 100644
--- a/src/mainboard/lenovo/g505s/PlatformGnbPcie.c
+++ b/src/mainboard/lenovo/g505s/PlatformGnbPcie.c
@@ -17,8 +17,11 @@
* Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
*/
-#include "PlatformGnbPcieComplex.h"
+#include "Porting.h"
+#include "AGESA.h"
+#include "amdlib.h"
+#include <northbridge/amd/agesa/agesawrapper.h>
#include <vendorcode/amd/agesa/f15tn/Proc/CPU/heapManager.h>
#define FILECODE PROC_GNB_PCIE_FAMILY_0X15_F15PCIECOMPLEXCONFIG_FILECODE
diff --git a/src/mainboard/lenovo/g505s/PlatformGnbPcieComplex.h b/src/mainboard/lenovo/g505s/PlatformGnbPcieComplex.h
deleted file mode 100644
index add900853a..0000000000
--- a/src/mainboard/lenovo/g505s/PlatformGnbPcieComplex.h
+++ /dev/null
@@ -1,31 +0,0 @@
-/*
- * This file is part of the coreboot project.
- *
- * Copyright (C) 2012 Advanced Micro Devices, Inc.
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; version 2 of the License.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
- */
-
-#ifndef _PLATFORM_GNB_PCIE_COMPLEX_H
-#define _PLATFORM_GNB_PCIE_COMPLEX_H
-
-#include <vendorcode/amd/agesa/f15tn/AGESA.h>
-#include <vendorcode/amd/agesa/f15tn/Lib/amdlib.h>
-
-VOID
-OemCustomizeInitEarly (
- IN OUT AMD_EARLY_PARAMS *InitEarly
- );
-
-#endif //_PLATFORM_GNB_PCIE_COMPLEX_H
diff --git a/src/mainboard/lippert/frontrunner-af/PlatformGnbPcie.c b/src/mainboard/lippert/frontrunner-af/PlatformGnbPcie.c
index c06296ffc6..331e27d373 100644
--- a/src/mainboard/lippert/frontrunner-af/PlatformGnbPcie.c
+++ b/src/mainboard/lippert/frontrunner-af/PlatformGnbPcie.c
@@ -25,6 +25,7 @@
#include "Filecode.h"
#include <string.h>
+#include <northbridge/amd/agesa/agesawrapper.h>
#define FILECODE PROC_RECOVERY_MEM_NB_ON_MRNON_FILECODE
diff --git a/src/mainboard/lippert/frontrunner-af/PlatformGnbPcieComplex.h b/src/mainboard/lippert/frontrunner-af/PlatformGnbPcieComplex.h
index 02c7f4ed1a..0b5760579d 100644
--- a/src/mainboard/lippert/frontrunner-af/PlatformGnbPcieComplex.h
+++ b/src/mainboard/lippert/frontrunner-af/PlatformGnbPcieComplex.h
@@ -65,9 +65,5 @@
//3:Half-swing(-3.5db) 4:extended length (-6db) 5:extended length(-8db)
#define GNB_GPP_PORT8_HOTPLUG_SUPPORT 0 //0:Disable 1:Basic 3:Enhanced
-VOID
-OemCustomizeInitEarly (
- IN OUT AMD_EARLY_PARAMS *InitEarly
- );
#endif //_PLATFORM_GNB_PCIE_COMPLEX_H
diff --git a/src/mainboard/lippert/toucan-af/PlatformGnbPcie.c b/src/mainboard/lippert/toucan-af/PlatformGnbPcie.c
index f8ba912198..5677aa8a3e 100644
--- a/src/mainboard/lippert/toucan-af/PlatformGnbPcie.c
+++ b/src/mainboard/lippert/toucan-af/PlatformGnbPcie.c
@@ -25,6 +25,7 @@
#include "Filecode.h"
#include <string.h>
+#include <northbridge/amd/agesa/agesawrapper.h>
#define FILECODE PROC_RECOVERY_MEM_NB_ON_MRNON_FILECODE
diff --git a/src/mainboard/lippert/toucan-af/PlatformGnbPcieComplex.h b/src/mainboard/lippert/toucan-af/PlatformGnbPcieComplex.h
index 69e26152c4..301938cefd 100644
--- a/src/mainboard/lippert/toucan-af/PlatformGnbPcieComplex.h
+++ b/src/mainboard/lippert/toucan-af/PlatformGnbPcieComplex.h
@@ -65,9 +65,5 @@
//3:Half-swing(-3.5db) 4:extended length (-6db) 5:extended length(-8db)
#define GNB_GPP_PORT8_HOTPLUG_SUPPORT 0 //0:Disable 1:Basic 3:Enhanced
-VOID
-OemCustomizeInitEarly (
- IN OUT AMD_EARLY_PARAMS *InitEarly
- );
#endif //_PLATFORM_GNB_PCIE_COMPLEX_H
diff --git a/src/northbridge/amd/agesa/agesawrapper.h b/src/northbridge/amd/agesa/agesawrapper.h
index b94ddf7821..49f6666074 100644
--- a/src/northbridge/amd/agesa/agesawrapper.h
+++ b/src/northbridge/amd/agesa/agesawrapper.h
@@ -65,4 +65,7 @@ void *agesawrapper_getlateinitptr (int pick);
AGESA_STATUS agesawrapper_fchs3earlyrestore(void);
AGESA_STATUS agesawrapper_fchs3laterestore(void);
+void OemCustomizeInitEarly(AMD_EARLY_PARAMS *InitEarly);
+void OemCustomizeInitPost(AMD_POST_PARAMS *InitPost);
+
#endif /* _AGESAWRAPPER_H_ */
diff --git a/src/northbridge/amd/agesa/family12/agesawrapper.c b/src/northbridge/amd/agesa/family12/agesawrapper.c
index 8a5f03fa77..7309262ddd 100644
--- a/src/northbridge/amd/agesa/family12/agesawrapper.c
+++ b/src/northbridge/amd/agesa/family12/agesawrapper.c
@@ -47,8 +47,6 @@ VOID *AcpiWheaMce = NULL;
VOID *AcpiWheaCmc = NULL;
VOID *AcpiAlib = NULL;
-VOID OemCustomizeInitEarly(IN OUT AMD_EARLY_PARAMS * InitEarly);
-
UINT32 ReadAmdSbPmr(IN UINT8 IndexValue, OUT UINT8 * DataValue);
UINT32 WriteAmdSbPmr(IN UINT8 IndexValue, IN UINT8 DataValue);
diff --git a/src/northbridge/amd/agesa/family14/agesawrapper.c b/src/northbridge/amd/agesa/family14/agesawrapper.c
index ee6caafbb3..1f580ef5bd 100644
--- a/src/northbridge/amd/agesa/family14/agesawrapper.c
+++ b/src/northbridge/amd/agesa/family14/agesawrapper.c
@@ -46,8 +46,6 @@ VOID *AcpiWheaMce = NULL;
VOID *AcpiWheaCmc = NULL;
VOID *AcpiAlib = NULL;
-VOID OemCustomizeInitEarly(IN OUT AMD_EARLY_PARAMS * InitEarly);
-
AGESA_STATUS agesawrapper_amdinitcpuio(VOID)
{
UINT64 MsrReg;
diff --git a/src/northbridge/amd/agesa/family15/agesawrapper.c b/src/northbridge/amd/agesa/family15/agesawrapper.c
index 74f9cb9b51..5c99551de1 100644
--- a/src/northbridge/amd/agesa/family15/agesawrapper.c
+++ b/src/northbridge/amd/agesa/family15/agesawrapper.c
@@ -47,11 +47,11 @@ VOID *AcpiWheaCmc = NULL;
VOID *AcpiAlib = NULL;
/* TODO: Function body should be in mainboard directory. */
-static VOID OemCustomizeInitEarly(AMD_EARLY_PARAMS * InitEarly)
+void OemCustomizeInitEarly(AMD_EARLY_PARAMS *InitEarly)
{
}
-static VOID OemCustomizeInitPost(AMD_POST_PARAMS *InitPost)
+void OemCustomizeInitPost(AMD_POST_PARAMS *InitPost)
{
#if IS_ENABLED(CONFIG_BOARD_AMD_DINAR)
InitPost->MemConfig.UmaMode = UMA_AUTO;
diff --git a/src/northbridge/amd/agesa/family15rl/agesawrapper.c b/src/northbridge/amd/agesa/family15rl/agesawrapper.c
index 66a351c56d..2099a49ac0 100644
--- a/src/northbridge/amd/agesa/family15rl/agesawrapper.c
+++ b/src/northbridge/amd/agesa/family15rl/agesawrapper.c
@@ -52,8 +52,6 @@ VOID *AcpiWheaCmc = NULL;
VOID *AcpiAlib = NULL;
VOID *AcpiIvrs = NULL;
-VOID OemCustomizeInitEarly(IN OUT AMD_EARLY_PARAMS * InitEarly);
-
AGESA_STATUS agesawrapper_amdinitcpuio(void)
{
UINT64 MsrReg;
diff --git a/src/northbridge/amd/agesa/family15tn/agesawrapper.c b/src/northbridge/amd/agesa/family15tn/agesawrapper.c
index 66a351c56d..2099a49ac0 100644
--- a/src/northbridge/amd/agesa/family15tn/agesawrapper.c
+++ b/src/northbridge/amd/agesa/family15tn/agesawrapper.c
@@ -52,8 +52,6 @@ VOID *AcpiWheaCmc = NULL;
VOID *AcpiAlib = NULL;
VOID *AcpiIvrs = NULL;
-VOID OemCustomizeInitEarly(IN OUT AMD_EARLY_PARAMS * InitEarly);
-
AGESA_STATUS agesawrapper_amdinitcpuio(void)
{
UINT64 MsrReg;
diff --git a/src/northbridge/amd/agesa/family16kb/agesawrapper.c b/src/northbridge/amd/agesa/family16kb/agesawrapper.c
index 66a351c56d..2099a49ac0 100644
--- a/src/northbridge/amd/agesa/family16kb/agesawrapper.c
+++ b/src/northbridge/amd/agesa/family16kb/agesawrapper.c
@@ -52,8 +52,6 @@ VOID *AcpiWheaCmc = NULL;
VOID *AcpiAlib = NULL;
VOID *AcpiIvrs = NULL;
-VOID OemCustomizeInitEarly(IN OUT AMD_EARLY_PARAMS * InitEarly);
-
AGESA_STATUS agesawrapper_amdinitcpuio(void)
{
UINT64 MsrReg;