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authorRichard Spiegel <richard.spiegel@amd.corp-partner.google.com>2018-09-13 13:59:23 -0700
committerMarc Jones <marc@marcjonesconsulting.com>2018-09-18 21:42:46 +0000
commit3a618dd2140bea8350f0fdf2d0f8af465894401a (patch)
treeca89f1e8df2724cb6cbc2e26994a99f1175942fd /src
parentc3f5293da7a1d4e14a9cf8b38567f9ca3c427a4e (diff)
downloadcoreboot-3a618dd2140bea8350f0fdf2d0f8af465894401a.tar.xz
mb/google/kahlee/variants/careena/devicetree.cb: Set STAPM values
AMD has tested careena, and for the time being is recommending a scalar of 68%, power limit of 7.8 W and time constant of 2500. Using new STAPM configuration code, set the desired values. BUG=b:111561217 TEST=none, code was tested with grunt. Change-Id: I42671ab0e66b21dc4f8c8c326c1fa33328b1390e Signed-off-by: Richard Spiegel <richard.spiegel@silverbackltd.com> Reviewed-on: https://review.coreboot.org/28597 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Martin Roth <martinroth@google.com> Reviewed-by: Marc Jones <marc@marcjonesconsulting.com>
Diffstat (limited to 'src')
-rw-r--r--src/mainboard/google/kahlee/variants/careena/devicetree.cb3
1 files changed, 3 insertions, 0 deletions
diff --git a/src/mainboard/google/kahlee/variants/careena/devicetree.cb b/src/mainboard/google/kahlee/variants/careena/devicetree.cb
index 1677cdfb91..d6331345f0 100644
--- a/src/mainboard/google/kahlee/variants/careena/devicetree.cb
+++ b/src/mainboard/google/kahlee/variants/careena/devicetree.cb
@@ -20,6 +20,9 @@ chip soc/amd/stoneyridge
register "dram_clear_on_reset" = "DRAM_CONTENTS_KEEP"
register "uma_mode" = "UMAMODE_SPECIFIED_SIZE"
register "uma_size" = "32 * MiB"
+ register "stapm_percent" = "68"
+ register "stapm_time" = "2500"
+ register "stapm_power" = "7800"
# Enable I2C0 for audio, USB3 hub at 400kHz
register "i2c[0]" = "{