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authorArthur Heymans <arthur@aheymans.xyz>2016-11-23 16:03:54 +0100
committerNico Huber <nico.h@gmx.de>2016-11-24 16:11:43 +0100
commit59bf309a49687a55c0f702b3bf0423df28ce6dd6 (patch)
tree8885fa5388dbb6b7b6c8415db2ee0b4883a11261 /src
parent81ae67a634d3bd72b10f798490ee25c3a3cb807a (diff)
downloadcoreboot-59bf309a49687a55c0f702b3bf0423df28ce6dd6.tar.xz
mb/ga-945gcm-s2l: Enable EC I/O decode range.
Change-Id: I021aae6130c475cb370b891ffaec6f1ad267540b Signed-off-by: Arthur Heymans <arthur@aheymans.xyz> Reviewed-on: https://review.coreboot.org/17580 Tested-by: build bot (Jenkins) Reviewed-by: Nico Huber <nico.h@gmx.de>
Diffstat (limited to 'src')
-rw-r--r--src/mainboard/gigabyte/ga-945gcm-s2l/romstage.c2
1 files changed, 2 insertions, 0 deletions
diff --git a/src/mainboard/gigabyte/ga-945gcm-s2l/romstage.c b/src/mainboard/gigabyte/ga-945gcm-s2l/romstage.c
index e60442eba1..d84eae1d93 100644
--- a/src/mainboard/gigabyte/ga-945gcm-s2l/romstage.c
+++ b/src/mainboard/gigabyte/ga-945gcm-s2l/romstage.c
@@ -91,6 +91,8 @@ static void ich7_enable_lpc(void)
pci_write_config16(PCI_DEV(0, 0x1f, 0), 0x82, 0x340d);
// Enable SuperIO Power Management Events
pci_write_config32(PCI_DEV(0, 0x1f, 0), 0x84, 0x000c0801);
+ /* LPC decode range 2: Environment Controller */
+ pci_write_config32(PCI_DEV(0, 0x1f, 0), 0x88, 0x00040291);
}
static void rcba_config(void)