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authorArthur Heymans <arthur@aheymans.xyz>2016-10-08 21:37:13 +0200
committerMartin Roth <martinroth@google.com>2016-10-11 23:32:37 +0200
commit626f8c84405fc4a16e72fc3e4dc829ca106ea2cf (patch)
tree5cc775f55693a975d4573aacb09bcea60a956de3 /src
parent6f8b7df8ab69cd2be7d024dfbd7fbeb3a684c6b3 (diff)
downloadcoreboot-626f8c84405fc4a16e72fc3e4dc829ca106ea2cf.tar.xz
i945/raminit.c: correctly write CLKCFG for 945GC
MHCBAR(CLKCFG) was previously incorrectly written by the sdram_program_memory_frequency function which required falsely limiting the max dram frequency for 945GC. TESTED on Intel d945gclf (memclock 667 and fsb 533) and Gigabyte ga-945gcm-s2l (memclock 667 and fsb 1067) Change-Id: I520efd69fa09fc9fde87c5301fd81121fde6a700 Signed-off-by: Arthur Heymans <arthur@aheymans.xyz> Reviewed-on: https://review.coreboot.org/16940 Tested-by: build bot (Jenkins) Reviewed-by: Martin Roth <martinroth@google.com> Reviewed-by: HAOUAS Elyes <ehaouas@noos.fr>
Diffstat (limited to 'src')
-rw-r--r--src/northbridge/intel/i945/raminit.c10
1 files changed, 4 insertions, 6 deletions
diff --git a/src/northbridge/intel/i945/raminit.c b/src/northbridge/intel/i945/raminit.c
index 5248b00d38..6ca95ee220 100644
--- a/src/northbridge/intel/i945/raminit.c
+++ b/src/northbridge/intel/i945/raminit.c
@@ -495,9 +495,6 @@ static void sdram_detect_cas_latency_and_ram_speed(struct sys_info * sysinfo, u8
case 667: max_ram_speed = 2; break;
}
- if (fsbclk() == 533)
- max_ram_speed = 1;
-
sysinfo->memory_frequency = 0;
sysinfo->cas = 0;
@@ -2079,6 +2076,7 @@ static void sdram_program_memory_frequency(struct sys_info *sysinfo)
{
u32 clkcfg;
u8 reg8;
+ u8 offset = IS_ENABLED(CONFIG_NORTHBRIDGE_INTEL_SUBTYPE_I945GM) ? 1 : 0;
printk(BIOS_DEBUG, "Setting Memory Frequency... ");
@@ -2100,9 +2098,9 @@ static void sdram_program_memory_frequency(struct sys_info *sysinfo)
}
switch (sysinfo->memory_frequency) {
- case 400: clkcfg |= (2 << 4); break;
- case 533: clkcfg |= (3 << 4); break;
- case 667: clkcfg |= (4 << 4); break;
+ case 400: clkcfg |= ((1 + offset) << 4); break;
+ case 533: clkcfg |= ((2 + offset) << 4); break;
+ case 667: clkcfg |= ((3 + offset) << 4); break;
default: die("Target Memory Frequency Error");
}