diff options
author | Stefan Reinauer <stepan@openbios.org> | 2004-03-24 14:10:45 +0000 |
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committer | Stefan Reinauer <stepan@openbios.org> | 2004-03-24 14:10:45 +0000 |
commit | 650b6d0b61087d979f18f57b64ede4ff9d1c56f6 (patch) | |
tree | f6a99b836a5344bf610a738b945ec7e6a4527427 /src | |
parent | b01fb94995a5d1fcd28bcbe7e6e509d69954c7c8 (diff) | |
download | coreboot-650b6d0b61087d979f18f57b64ede4ff9d1c56f6.tar.xz |
Further trimming freebios2 towards code reuse.
Unified AMD K8 reset function that can be customized via mainboard Config.lb
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1471 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
Diffstat (limited to 'src')
-rw-r--r-- | src/config/Options.lb | 15 | ||||
-rw-r--r-- | src/mainboard/Iwill/DK8S2/Config.lb | 8 | ||||
-rw-r--r-- | src/mainboard/Iwill/DK8X/Config.lb | 8 | ||||
-rw-r--r-- | src/mainboard/amd/quartet/Config.lb | 8 | ||||
-rw-r--r-- | src/mainboard/amd/solo/Config.lb | 12 | ||||
-rw-r--r-- | src/mainboard/arima/hdama/Config.lb | 8 | ||||
-rw-r--r-- | src/mainboard/ibm/e325/Config.lb | 8 | ||||
-rw-r--r-- | src/mainboard/newisys/khepri/Config.lb | 8 | ||||
-rw-r--r-- | src/mainboard/tyan/s2850/Config.lb | 9 | ||||
-rw-r--r-- | src/mainboard/tyan/s2880/Config.lb | 9 | ||||
-rw-r--r-- | src/mainboard/tyan/s2881/Config.lb | 9 | ||||
-rw-r--r-- | src/mainboard/tyan/s2882/Config.lb | 9 | ||||
-rw-r--r-- | src/mainboard/tyan/s2885/Config.lb | 11 | ||||
-rw-r--r-- | src/mainboard/tyan/s4880/Config.lb | 9 | ||||
-rw-r--r-- | src/southbridge/amd/amd8111/Config.lb | 1 | ||||
-rw-r--r-- | src/southbridge/amd/amd8111/amd8111_reset.c | 45 |
16 files changed, 161 insertions, 16 deletions
diff --git a/src/config/Options.lb b/src/config/Options.lb index 2009106d04..a5d1ed911b 100644 --- a/src/config/Options.lb +++ b/src/config/Options.lb @@ -675,6 +675,21 @@ define HAVE_HARD_RESET export used comment "Have hard reset" end +define HARD_RESET_BUS + default 1 + export always + comment "Bus number of southbridge device doing reset" +end +define HARD_RESET_DEVICE + default 5 + export always + comment "Device number of southbridge device doing reset" +end +define HARD_RESET_FUNCTION + default 0 + export always + comment "Function number of southbridge device doing reset" +end define MEMORY_HOLE default none export used diff --git a/src/mainboard/Iwill/DK8S2/Config.lb b/src/mainboard/Iwill/DK8S2/Config.lb index cc57d6397b..c974bdead1 100644 --- a/src/mainboard/Iwill/DK8S2/Config.lb +++ b/src/mainboard/Iwill/DK8S2/Config.lb @@ -3,6 +3,9 @@ uses HAVE_PIRQ_TABLE uses USE_FALLBACK_IMAGE uses HAVE_FALLBACK_BOOT uses HAVE_HARD_RESET +uses HARD_RESET_BUS +uses HARD_RESET_DEVICE +uses HARD_RESET_FUNCTION uses IRQ_SLOT_COUNT uses HAVE_OPTION_TABLE uses CONFIG_MAX_CPUS @@ -41,6 +44,10 @@ default HAVE_FALLBACK_BOOT=1 ## default HAVE_HARD_RESET=1 +default HARD_RESET_BUS=1 +default HARD_RESET_DEVICE=4 +default HARD_RESET_FUNCTION=0 + ## ## Build code to export a programmable irq routing table ## @@ -149,7 +156,6 @@ driver mainboard.o #object static_devices.o if HAVE_MP_TABLE object mptable.o end if HAVE_PIRQ_TABLE object irq_tables.o end -object reset.o ## ## Romcc output diff --git a/src/mainboard/Iwill/DK8X/Config.lb b/src/mainboard/Iwill/DK8X/Config.lb index cc57d6397b..c974bdead1 100644 --- a/src/mainboard/Iwill/DK8X/Config.lb +++ b/src/mainboard/Iwill/DK8X/Config.lb @@ -3,6 +3,9 @@ uses HAVE_PIRQ_TABLE uses USE_FALLBACK_IMAGE uses HAVE_FALLBACK_BOOT uses HAVE_HARD_RESET +uses HARD_RESET_BUS +uses HARD_RESET_DEVICE +uses HARD_RESET_FUNCTION uses IRQ_SLOT_COUNT uses HAVE_OPTION_TABLE uses CONFIG_MAX_CPUS @@ -41,6 +44,10 @@ default HAVE_FALLBACK_BOOT=1 ## default HAVE_HARD_RESET=1 +default HARD_RESET_BUS=1 +default HARD_RESET_DEVICE=4 +default HARD_RESET_FUNCTION=0 + ## ## Build code to export a programmable irq routing table ## @@ -149,7 +156,6 @@ driver mainboard.o #object static_devices.o if HAVE_MP_TABLE object mptable.o end if HAVE_PIRQ_TABLE object irq_tables.o end -object reset.o ## ## Romcc output diff --git a/src/mainboard/amd/quartet/Config.lb b/src/mainboard/amd/quartet/Config.lb index 3db696bb7b..20667f5db4 100644 --- a/src/mainboard/amd/quartet/Config.lb +++ b/src/mainboard/amd/quartet/Config.lb @@ -3,6 +3,9 @@ uses HAVE_PIRQ_TABLE uses USE_FALLBACK_IMAGE uses HAVE_FALLBACK_BOOT uses HAVE_HARD_RESET +uses HARD_RESET_BUS +uses HARD_RESET_DEVICE +uses HARD_RESET_FUNCTION uses IRQ_SLOT_COUNT uses HAVE_OPTION_TABLE uses CONFIG_MAX_CPUS @@ -47,6 +50,10 @@ default HAVE_FALLBACK_BOOT=1 ## default HAVE_HARD_RESET=1 +default HARD_RESET_BUS=1 +default HARD_RESET_DEVICE=4 +default HARD_RESET_FUNCTION=0 + ## ## Build code to export a programmable irq routing table ## @@ -160,7 +167,6 @@ arch i386 end driver mainboard.o if HAVE_MP_TABLE object mptable.o end if HAVE_PIRQ_TABLE object irq_tables.o end -object reset.o ## ## Romcc output diff --git a/src/mainboard/amd/solo/Config.lb b/src/mainboard/amd/solo/Config.lb index bb9044eb0a..7147b4546a 100644 --- a/src/mainboard/amd/solo/Config.lb +++ b/src/mainboard/amd/solo/Config.lb @@ -3,6 +3,9 @@ uses HAVE_PIRQ_TABLE uses USE_FALLBACK_IMAGE uses HAVE_FALLBACK_BOOT uses HAVE_HARD_RESET +uses HARD_RESET_BUS +uses HARD_RESET_DEVICE +uses HARD_RESET_FUNCTION uses IRQ_SLOT_COUNT uses HAVE_OPTION_TABLE uses CONFIG_MAX_CPUS @@ -47,6 +50,10 @@ default HAVE_FALLBACK_BOOT=1 ## default HAVE_HARD_RESET=1 +default HARD_RESET_BUS=1 +default HARD_RESET_DEVICE=5 +default HARD_RESET_FUNCTION=0 + ## ## Build code to export a programmable irq routing table ## @@ -85,8 +92,8 @@ default CONFIG_IOAPIC=1 ## ## Clean up the motherboard id strings ## -#default MAINBOARD_PART_NUMBER="SOLO7" -#default MAINBOARD_VENDOR="AMD" +default MAINBOARD_PART_NUMBER="SOLO" +default MAINBOARD_VENDOR="AMD" ### ### LinuxBIOS layout values @@ -159,7 +166,6 @@ arch i386 end driver mainboard.o if HAVE_MP_TABLE object mptable.o end if HAVE_PIRQ_TABLE object irq_tables.o end -object reset.o ## ## Romcc output diff --git a/src/mainboard/arima/hdama/Config.lb b/src/mainboard/arima/hdama/Config.lb index fbb1a2bbee..1d6d9b4a82 100644 --- a/src/mainboard/arima/hdama/Config.lb +++ b/src/mainboard/arima/hdama/Config.lb @@ -3,6 +3,9 @@ uses HAVE_PIRQ_TABLE uses USE_FALLBACK_IMAGE uses HAVE_FALLBACK_BOOT uses HAVE_HARD_RESET +uses HARD_RESET_BUS +uses HARD_RESET_DEVICE +uses HARD_RESET_FUNCTION uses IRQ_SLOT_COUNT uses HAVE_OPTION_TABLE uses CONFIG_MAX_CPUS @@ -47,6 +50,10 @@ default HAVE_FALLBACK_BOOT=1 ## default HAVE_HARD_RESET=1 +default HARD_RESET_BUS=1 +default HARD_RESET_DEVICE=4 +default HARD_RESET_FUNCTION=0 + ## ## Build code to export a programmable irq routing table ## @@ -160,7 +167,6 @@ arch i386 end driver mainboard.o if HAVE_MP_TABLE object mptable.o end if HAVE_PIRQ_TABLE object irq_tables.o end -object reset.o ## ## Romcc output diff --git a/src/mainboard/ibm/e325/Config.lb b/src/mainboard/ibm/e325/Config.lb index ad659b58e6..bb40efcffb 100644 --- a/src/mainboard/ibm/e325/Config.lb +++ b/src/mainboard/ibm/e325/Config.lb @@ -3,6 +3,9 @@ uses HAVE_PIRQ_TABLE uses USE_FALLBACK_IMAGE uses HAVE_FALLBACK_BOOT uses HAVE_HARD_RESET +uses HARD_RESET_BUS +uses HARD_RESET_DEVICE +uses HARD_RESET_FUNCTION uses IRQ_SLOT_COUNT uses HAVE_OPTION_TABLE uses CONFIG_MAX_CPUS @@ -47,6 +50,10 @@ default HAVE_FALLBACK_BOOT=1 ## default HAVE_HARD_RESET=1 +default HARD_RESET_BUS=1 +default HARD_RESET_DEVICE=4 +default HARD_RESET_FUNCTION=0 + ## ## Build code to export a programmable irq routing table ## @@ -160,7 +167,6 @@ arch i386 end driver mainboard.o if HAVE_MP_TABLE object mptable.o end if HAVE_PIRQ_TABLE object irq_tables.o end -object reset.o ## ## Romcc output diff --git a/src/mainboard/newisys/khepri/Config.lb b/src/mainboard/newisys/khepri/Config.lb index d0bd8654d4..9dd2f318dd 100644 --- a/src/mainboard/newisys/khepri/Config.lb +++ b/src/mainboard/newisys/khepri/Config.lb @@ -3,6 +3,9 @@ uses HAVE_PIRQ_TABLE uses USE_FALLBACK_IMAGE uses HAVE_FALLBACK_BOOT uses HAVE_HARD_RESET +uses HARD_RESET_BUS +uses HARD_RESET_DEVICE +uses HARD_RESET_FUNCTION uses IRQ_SLOT_COUNT uses HAVE_OPTION_TABLE uses CONFIG_MAX_CPUS @@ -47,6 +50,10 @@ default HAVE_FALLBACK_BOOT=1 ## default HAVE_HARD_RESET=1 +default HARD_RESET_BUS=1 +default HARD_RESET_DEVICE=4 +default HARD_RESET_FUNCTION=0 + ## ## Build code to export a programmable irq routing table ## @@ -161,7 +168,6 @@ driver mainboard.o driver blade3d.o if HAVE_MP_TABLE object mptable.o end if HAVE_PIRQ_TABLE object irq_tables.o end -object reset.o ## ## Romcc output diff --git a/src/mainboard/tyan/s2850/Config.lb b/src/mainboard/tyan/s2850/Config.lb index fe6f7e319e..ad189c9202 100644 --- a/src/mainboard/tyan/s2850/Config.lb +++ b/src/mainboard/tyan/s2850/Config.lb @@ -3,6 +3,9 @@ uses HAVE_PIRQ_TABLE uses USE_FALLBACK_IMAGE uses MAINBOARD uses ARCH +uses HARD_RESET_BUS +uses HARD_RESET_DEVICE +uses HARD_RESET_FUNCTION # # ### @@ -24,11 +27,15 @@ driver adaptec_scsi.o driver promise_sata.o driver intel_nic.o driver broadcom_nic.o -object reset.o +#object reset.o #object static_devices.o if HAVE_MP_TABLE object mptable.o end if HAVE_PIRQ_TABLE object irq_tables.o end # +default HARD_RESET_BUS=1 +default HARD_RESET_DEVICE=2 +default HARD_RESET_FUNCTION=0 +# arch i386 end #cpu k8 end # diff --git a/src/mainboard/tyan/s2880/Config.lb b/src/mainboard/tyan/s2880/Config.lb index 9c0b9e0a2f..275170ac9f 100644 --- a/src/mainboard/tyan/s2880/Config.lb +++ b/src/mainboard/tyan/s2880/Config.lb @@ -6,6 +6,9 @@ uses LB_CKS_RANGE_END uses LB_CKS_LOC uses MAINBOARD uses ARCH +uses HARD_RESET_BUS +uses HARD_RESET_DEVICE +uses HARD_RESET_FUNCTION # # ### @@ -33,10 +36,14 @@ driver mainboard.o #driver adaptec_scsi.o #driver promise_sata.o #driver intel_nic.o -object reset.o +#object reset.o if HAVE_MP_TABLE object mptable.o end if HAVE_PIRQ_TABLE object irq_tables.o end # +default HARD_RESET_BUS=1 +default HARD_RESET_DEVICE=4 +default HARD_RESET_FUNCTION=0 +# arch i386 end # ### diff --git a/src/mainboard/tyan/s2881/Config.lb b/src/mainboard/tyan/s2881/Config.lb index a89f1dbcf7..786391095a 100644 --- a/src/mainboard/tyan/s2881/Config.lb +++ b/src/mainboard/tyan/s2881/Config.lb @@ -6,6 +6,9 @@ uses LB_CKS_RANGE_END uses LB_CKS_LOC uses MAINBOARD uses ARCH +uses HARD_RESET_BUS +uses HARD_RESET_DEVICE +uses HARD_RESET_FUNCTION # # ### @@ -35,10 +38,14 @@ driver mainboard.o #driver si_sata.o #driver intel_nic.o #driver broadcom_nic.o -object reset.o +#object reset.o if HAVE_MP_TABLE object mptable.o end if HAVE_PIRQ_TABLE object irq_tables.o end # +default HARD_RESET_BUS=1 +default HARD_RESET_DEVICE=4 +default HARD_RESET_FUNCTION=0 +# arch i386 end #cpu k8 end # diff --git a/src/mainboard/tyan/s2882/Config.lb b/src/mainboard/tyan/s2882/Config.lb index 45406d4ea4..c307568267 100644 --- a/src/mainboard/tyan/s2882/Config.lb +++ b/src/mainboard/tyan/s2882/Config.lb @@ -6,6 +6,9 @@ uses LB_CKS_RANGE_END uses LB_CKS_LOC uses MAINBOARD uses ARCH +uses HARD_RESET_BUS +uses HARD_RESET_DEVICE +uses HARD_RESET_FUNCTION # # ### @@ -34,10 +37,14 @@ driver mainboard.o #driver si_sata.o driver intel_nic.o #driver broadcom_nic.o -object reset.o +#object reset.o if HAVE_MP_TABLE object mptable.o end if HAVE_PIRQ_TABLE object irq_tables.o end # +default HARD_RESET_BUS=1 +default HARD_RESET_DEVICE=4 +default HARD_RESET_FUNCTION=0 +# arch i386 end #cpu k8 end # diff --git a/src/mainboard/tyan/s2885/Config.lb b/src/mainboard/tyan/s2885/Config.lb index 7ff42d0189..c0b61145cb 100644 --- a/src/mainboard/tyan/s2885/Config.lb +++ b/src/mainboard/tyan/s2885/Config.lb @@ -6,6 +6,9 @@ uses LB_CKS_RANGE_END uses LB_CKS_LOC uses MAINBOARD uses ARCH +uses HARD_RESET_BUS +uses HARD_RESET_DEVICE +uses HARD_RESET_FUNCTION # # @@ -37,10 +40,14 @@ driver mainboard.o #driver adaptec_scsi.o #driver si_sata.o #driver intel_nic.o -object reset.o +#object reset.o if HAVE_MP_TABLE object mptable.o end if HAVE_PIRQ_TABLE object irq_tables.o end - +# +default HARD_RESET_BUS=3 +default HARD_RESET_DEVICE=4 +default HARD_RESET_FUNCTION=0 +# # arch i386 end diff --git a/src/mainboard/tyan/s4880/Config.lb b/src/mainboard/tyan/s4880/Config.lb index 58e71b4668..69e647984f 100644 --- a/src/mainboard/tyan/s4880/Config.lb +++ b/src/mainboard/tyan/s4880/Config.lb @@ -6,6 +6,9 @@ uses LB_CKS_RANGE_END uses LB_CKS_LOC uses MAINBOARD uses ARCH +uses HARD_RESET_BUS +uses HARD_RESET_DEVICE +uses HARD_RESET_FUNCTION # # ### @@ -34,10 +37,14 @@ driver mainboard.o #driver adaptec_scsi.o #driver si_sata.o #driver intel_nic.o -object reset.o +#object reset.o if HAVE_MP_TABLE object mptable.o end if HAVE_PIRQ_TABLE object irq_tables.o end # +default HARD_RESET_BUS=1 +default HARD_RESET_DEVICE=4 +default HARD_RESET_FUNCTION=0 +# arch i386 end #cpu k8 end # diff --git a/src/southbridge/amd/amd8111/Config.lb b/src/southbridge/amd/amd8111/Config.lb index 5bbbaba65e..57d299cfbf 100644 --- a/src/southbridge/amd/amd8111/Config.lb +++ b/src/southbridge/amd/amd8111/Config.lb @@ -8,3 +8,4 @@ driver amd8111_usb2.o driver amd8111_ac97.o driver amd8111_nic.o driver amd8111_pci.o +object amd8111_reset.o diff --git a/src/southbridge/amd/amd8111/amd8111_reset.c b/src/southbridge/amd/amd8111/amd8111_reset.c new file mode 100644 index 0000000000..822a1e378f --- /dev/null +++ b/src/southbridge/amd/amd8111/amd8111_reset.c @@ -0,0 +1,45 @@ +#include <arch/io.h> + +#define PCI_DEV(BUS, DEV, FN) ( \ + (((BUS) & 0xFF) << 16) | \ + (((DEV) & 0x1f) << 11) | \ + (((FN) & 0x7) << 8)) + +#define AMD8111_RESET PCI_DEV( \ + HARD_RESET_BUS, \ + HARD_RESET_DEVICE, \ + HARD_RESET_FUNCTION) + +typedef unsigned device_t; + +static void pci_write_config8(device_t dev, unsigned where, unsigned char value) +{ + unsigned addr; + addr = dev | where; + outl(0x80000000 | (addr & ~3), 0xCF8); + outb(value, 0xCFC + (addr & 3)); +} + +static void pci_write_config32(device_t dev, unsigned where, unsigned value) +{ + unsigned addr; + addr = dev | where; + outl(0x80000000 | (addr & ~3), 0xCF8); + outl(value, 0xCFC); +} + +static unsigned pci_read_config32(device_t dev, unsigned where) +{ + unsigned addr; + addr = dev | where; + outl(0x80000000 | (addr & ~3), 0xCF8); + return inl(0xCFC); +} + +#include "../../../northbridge/amd/amdk8/reset_test.c" + +void hard_reset(void) +{ + set_bios_reset(); + pci_write_config8(AMD8111_RESET, 0x47, 1); +} |