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authorFurquan Shaikh <furquan@google.com>2015-07-10 17:36:49 -0700
committerPatrick Georgi <pgeorgi@google.com>2015-07-13 10:12:01 +0200
commit657deac015e3779c1cdca837cf0f1b77b93baa54 (patch)
tree926fb6f1036bc9927f4cbf1a0d4f4d6246c7f22e /src
parent25fbe2ad8277a7e5a950920b0f658c1a7c8d30d8 (diff)
downloadcoreboot-657deac015e3779c1cdca837cf0f1b77b93baa54.tar.xz
smaug: Set LDO2 voltage to 1.8V
LDO2 regulator is used as an always-on reference for the droop alert circuit. Set output voltage to match kernel settings. CQ-DEPEND=CL:284649 BUG=chrome-os-partner:42305 BRANCH=None TEST=Compiles successfully and boots to kernel prompt Change-Id: I5ef4e266d8ec278dadffa846af8dc49b6d18c37e Signed-off-by: Patrick Georgi <pgeorgi@chromium.org> Original-Commit-Id: 611465f6248cba0ddce0083b431cb7ee17bc4b4c Original-Change-Id: I58cc473452b871392d813387707a0b8288e46561 Original-Signed-off-by: Furquan Shaikh <furquan@google.com> Original-Reviewed-on: https://chromium-review.googlesource.com/284879 Original-Tested-by: Furquan Shaikh <furquan@chromium.org> Original-Reviewed-by: Aaron Durbin <adurbin@chromium.org> Original-Commit-Queue: Furquan Shaikh <furquan@chromium.org> Original-Trybot-Ready: Furquan Shaikh <furquan@chromium.org> Reviewed-on: http://review.coreboot.org/10900 Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org> Tested-by: build bot (Jenkins)
Diffstat (limited to 'src')
-rw-r--r--src/mainboard/google/smaug/pmic.c7
1 files changed, 7 insertions, 0 deletions
diff --git a/src/mainboard/google/smaug/pmic.c b/src/mainboard/google/smaug/pmic.c
index 73aa0de83c..b10e67b0ee 100644
--- a/src/mainboard/google/smaug/pmic.c
+++ b/src/mainboard/google/smaug/pmic.c
@@ -95,6 +95,13 @@ void pmic_init(unsigned bus)
pmic_write_reg_77620(bus, MAX77620_CNFG2SD_REG, 0x04, 1);
pmic_write_reg_77620(bus, MAX77620_SD1_REG, 0x2a, 1);
+ /*
+ * MAX77620: Set LDO2 output to 1.8V. LDO2 is used as always-on
+ * reference for the droop alert circuit. Match this setting with what
+ * the kernel expects.
+ */
+ pmic_write_reg_77620(bus, MAX77620_CNFG1_L2_REG, 0x14, 1);
+
/* MAX77621: Set VOUT_REG to 1.0V - CPU VREG */
pmic_write_reg_77621(bus, MAX77621_VOUT_REG, 0xBF, 1);