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authorRaul E Rangel <rrangel@chromium.org>2020-05-11 15:47:39 -0600
committerPatrick Georgi <pgeorgi@google.com>2020-05-13 08:36:40 +0000
commit658a2913a5bbe9c638c0d069ea663ecb77b490b0 (patch)
tree423b59b0c25ba66d426c0b04ccb8ac5adbd05b68 /src
parente44651b496a2f88fd1212ab4228323a5eee1b80c (diff)
downloadcoreboot-658a2913a5bbe9c638c0d069ea663ecb77b490b0.tar.xz
soc/amd/picasso: Add data fabric pci_devs
The device ids are already defined in include/device/pci_ids.h as PCI_DEVICE_ID_AMD_FAM17H_DF*. BUG=b:147042464 TEST=Build trembyle Signed-off-by: Raul E Rangel <rrangel@chromium.org> Change-Id: Ic68a1067e5976af972592d7352c40a5c66dbeb8c Reviewed-on: https://review.coreboot.org/c/coreboot/+/41267 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Furquan Shaikh <furquan@google.com> Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net> Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Diffstat (limited to 'src')
-rw-r--r--src/soc/amd/picasso/include/soc/pci_devs.h24
1 files changed, 24 insertions, 0 deletions
diff --git a/src/soc/amd/picasso/include/soc/pci_devs.h b/src/soc/amd/picasso/include/soc/pci_devs.h
index a97391e86a..282d86ce09 100644
--- a/src/soc/amd/picasso/include/soc/pci_devs.h
+++ b/src/soc/amd/picasso/include/soc/pci_devs.h
@@ -89,6 +89,30 @@
#define HDA1_DEVFN PCI_DEVFN(HDA1_DEV, HDA1_FUNC)
#define SOC_HDA1_DEV _SOC_DEV(HDA1_DEV, HDA1_FUNC)
+/* Data Fabric functions */
+#define DF_DEV 0x18
+
+#define DF_F0_DEVFN PCI_DEVFN(DF_DEV, 0)
+#define SOC_DF_F0_DEV _SOC_DEV(DF_DEV, 0)
+
+#define DF_F1_DEVFN PCI_DEVFN(DF_DEV, 1)
+#define SOC_DF_F1_DEV _SOC_DEV(DF_DEV, 1)
+
+#define DF_F2_DEVFN PCI_DEVFN(DF_DEV, 2)
+#define SOC_DF_F2_DEV _SOC_DEV(DF_DEV, 2)
+
+#define DF_F3_DEVFN PCI_DEVFN(DF_DEV, 3)
+#define SOC_DF_F3_DEV _SOC_DEV(DF_DEV, 3)
+
+#define DF_F4_DEVFN PCI_DEVFN(DF_DEV, 4)
+#define SOC_DF_F4_DEV _SOC_DEV(DF_DEV, 4)
+
+#define DF_F5_DEVFN PCI_DEVFN(DF_DEV, 5)
+#define SOC_DF_F5_DEV _SOC_DEV(DF_DEV, 5)
+
+#define DF_F6_DEVFN PCI_DEVFN(DF_DEV, 6)
+#define SOC_DF_F6_DEV _SOC_DEV(DF_DEV, 6)
+
/* USB 3.1 */
#define XHCI0_DEV 0x0
#define XHCI0_FUNC 3