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authorArthur Heymans <arthur@aheymans.xyz>2017-09-26 23:18:14 +0200
committerArthur Heymans <arthur@aheymans.xyz>2017-10-12 08:07:18 +0000
commit6af8aab539cce0bb1841cae7dfb0addbc8321855 (patch)
treeb439e2f17f4cd021840e4ef9fdcfbb3ac94dd6bc /src
parentf73bc0b2d103705a557142461d19496b59adda81 (diff)
downloadcoreboot-6af8aab539cce0bb1841cae7dfb0addbc8321855.tar.xz
nb/intel/sandybridge/raminit: Fix setting scramble seed for CH1
The scramble seed intended for CH1 were written to the regs of CH0. Write the scramble seed for CH1 at the correct offset. TESTED on Lenovo T430, HP 2760P, Asrock B75PRO3-M. Change-Id: I3778947e96b3298c38e6d5b74988e617e1ffea7b Signed-off-by: Arthur Heymans <arthur@aheymans.xyz> Reviewed-on: https://review.coreboot.org/21710 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Patrick Rudolph <siro@das-labor.org> Reviewed-by: Felix Held <felix-coreboot@felixheld.de> Reviewed-by: Iru Cai <mytbk920423@gmail.com>
Diffstat (limited to 'src')
-rw-r--r--src/northbridge/intel/sandybridge/raminit_common.c6
1 files changed, 3 insertions, 3 deletions
diff --git a/src/northbridge/intel/sandybridge/raminit_common.c b/src/northbridge/intel/sandybridge/raminit_common.c
index b7340362c5..eaef5f70dd 100644
--- a/src/northbridge/intel/sandybridge/raminit_common.c
+++ b/src/northbridge/intel/sandybridge/raminit_common.c
@@ -3098,9 +3098,9 @@ void set_scrambling_seed(ramctr_timing * ctrl)
};
FOR_ALL_POPULATED_CHANNELS {
MCHBAR32(0x4020 + 0x400 * channel) &= ~0x10000000;
- write32(DEFAULT_MCHBAR + 0x4034, seeds[channel][0]);
- write32(DEFAULT_MCHBAR + 0x403c, seeds[channel][1]);
- write32(DEFAULT_MCHBAR + 0x4038, seeds[channel][2]);
+ MCHBAR32(0x4034 + 0x400 * channel) = seeds[channel][0];
+ MCHBAR32(0x403c + 0x400 * channel) = seeds[channel][1];
+ MCHBAR32(0x4038 + 0x400 * channel) = seeds[channel][2];
}
}