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authorKyösti Mälkki <kyosti.malkki@gmail.com>2019-07-02 13:19:39 +0300
committerMartin Roth <martinroth@google.com>2019-07-07 21:27:22 +0000
commit78561f481e3c25e23dc658f883a16402fd9d38f6 (patch)
treef863d7cc4e50e2ce4780ad562a1eb6702cc3e521 /src
parenteb5e47dd9467602d09a3f8e6e4cf5dd702bb0cc4 (diff)
downloadcoreboot-78561f481e3c25e23dc658f883a16402fd9d38f6.tar.xz
lib/romstage_stack.c: Remove file
After platforms have moved to POSTCAR_STAGE=y the only remaining user is binaryPI now. Make it simpler. Change-Id: Ia70c5c85e06c42f965fb7204b633db9b619e2e84 Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/33957 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Angel Pons <th3fanbus@gmail.com> Reviewed-by: HAOUAS Elyes <ehaouas@noos.fr> Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Diffstat (limited to 'src')
-rw-r--r--src/cpu/amd/pi/romstage.c3
-rw-r--r--src/include/program_loading.h4
-rw-r--r--src/lib/Makefile.inc2
-rw-r--r--src/lib/romstage_stack.c34
4 files changed, 1 insertions, 42 deletions
diff --git a/src/cpu/amd/pi/romstage.c b/src/cpu/amd/pi/romstage.c
index aa14826149..cfd41648ba 100644
--- a/src/cpu/amd/pi/romstage.c
+++ b/src/cpu/amd/pi/romstage.c
@@ -40,8 +40,7 @@ void *asmlinkage romstage_main(unsigned long bist)
romstage_handoff_init(s3resume);
- uintptr_t stack_top = romstage_ram_stack_base(HIGH_ROMSTAGE_STACK_SIZE,
- ROMSTAGE_STACK_CBMEM);
+ char *stack_top = cbmem_add(CBMEM_ID_ROMSTAGE_RAM_STACK, HIGH_ROMSTAGE_STACK_SIZE);
stack_top += HIGH_ROMSTAGE_STACK_SIZE;
printk(BIOS_DEBUG, "Move CAR stack.\n");
diff --git a/src/include/program_loading.h b/src/include/program_loading.h
index 223fc0bef1..5ac74bf238 100644
--- a/src/include/program_loading.h
+++ b/src/include/program_loading.h
@@ -173,10 +173,6 @@ void run_romstage(void);
/* Run ramstage from romstage. */
void run_ramstage(void);
-/* Determine where stack for ramstage loader is located. */
-enum { ROMSTAGE_STACK_CBMEM, ROMSTAGE_STACK_LOW_MEM };
-uintptr_t romstage_ram_stack_base(size_t size, int src);
-
/* Backup OS memory to CBMEM_ID_RESUME on ACPI S3 resume path,
* if ramstage overwrites low memory. */
void backup_ramstage_section(uintptr_t base, size_t size);
diff --git a/src/lib/Makefile.inc b/src/lib/Makefile.inc
index 16d5c649b2..f6d3f6deb5 100644
--- a/src/lib/Makefile.inc
+++ b/src/lib/Makefile.inc
@@ -89,9 +89,7 @@ ramstage-y += region_file.c
romstage-y += region_file.c
ramstage-y += romstage_handoff.c
romstage-y += romstage_handoff.c
-romstage-y += romstage_stack.c
romstage-y += selfboot.c
-ramstage-y += romstage_stack.c
romstage-y += stack.c
ramstage-y += rtc.c
diff --git a/src/lib/romstage_stack.c b/src/lib/romstage_stack.c
deleted file mode 100644
index 4fe1459532..0000000000
--- a/src/lib/romstage_stack.c
+++ /dev/null
@@ -1,34 +0,0 @@
-/*
- * This file is part of the coreboot project.
- *
- * Copyright (C) 2013 Google Inc.
- * Copyright (C) 2015-2016 Intel Corp.
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; version 2 of the License.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- */
-
-#include <program_loading.h>
-#include <cbmem.h>
-
-/*
- * Romstage needs quite a bit of stack for decompressing images since the lzma
- * lib keeps its state on the stack during romstage.
- */
-#define ROMSTAGE_RAM_STACK_SIZE 0x5000
-
-uintptr_t romstage_ram_stack_base(size_t size, int src)
-{
- /* cbmem_add() does a find() before add(). */
- if (src == ROMSTAGE_STACK_CBMEM)
- return (uintptr_t)cbmem_add(CBMEM_ID_ROMSTAGE_RAM_STACK, size);
- if (src == ROMSTAGE_STACK_LOW_MEM)
- return CONFIG_RAMTOP - size;
- return 0;
-}