diff options
| author | Venkateswarlu Vinjamuri <venkateswarlu.v.vinjamuri@intel.com> | 2017-02-24 15:54:39 -0800 |
|---|---|---|
| committer | Martin Roth <martinroth@google.com> | 2017-03-10 11:12:08 +0100 |
| commit | 7e4d12c5b12107bb7682e050c66f97000e064ce2 (patch) | |
| tree | c72345830e18881576cebde1344b9583d2a5d5c3 /src | |
| parent | 6dd7b402d512d5bfc5f3bc20b0fc8c80aca817db (diff) | |
| download | coreboot-7e4d12c5b12107bb7682e050c66f97000e064ce2.tar.xz | |
mainboard/google/reef: Configure SDCARD card detect pin
This configures GPIO_177 as an input pin for SDCARD card
detect. This also changes the ownership of the pin from ACPI
to GPIO driver.
Assign the sdcard card detect pin in devicetree for reef variants.
CQ-DEPEND=448173
BUG=chrome-os-partner:63070
TEST=None
Change-Id: Ia8aef60bd7d0ea36afb39f76fab051aa46a2ed64
Signed-off-by: Venkateswarlu Vinjamuri <venkateswarlu.v.vinjamuri@intel.com>
Reviewed-on: https://review.coreboot.org/18497
Tested-by: build bot (Jenkins)
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Diffstat (limited to 'src')
4 files changed, 10 insertions, 1 deletions
diff --git a/src/mainboard/google/reef/variants/baseboard/devicetree.cb b/src/mainboard/google/reef/variants/baseboard/devicetree.cb index b0c82e2be8..443918e037 100644 --- a/src/mainboard/google/reef/variants/baseboard/devicetree.cb +++ b/src/mainboard/google/reef/variants/baseboard/devicetree.cb @@ -17,6 +17,9 @@ chip soc/intel/apollolake # If the Board does not have PERST_0, assign GPIO_PRT0_UDEF register "prt0_gpio" = "GPIO_122" + # GPIO for SD card detect + register "sdcard_cd_gpio" = "GPIO_177" + # EMMC TX DATA Delay 1 # Refer to EDS-Vol2-22.3. # [14:8] steps of delay for HS400, each 125ps. diff --git a/src/mainboard/google/reef/variants/baseboard/gpio.c b/src/mainboard/google/reef/variants/baseboard/gpio.c index ae89da10d3..c572b1ebdd 100644 --- a/src/mainboard/google/reef/variants/baseboard/gpio.c +++ b/src/mainboard/google/reef/variants/baseboard/gpio.c @@ -59,7 +59,7 @@ static const struct pad_config gpio_table[] = { PAD_CFG_NF(GPIO_175, UP_20K, DEEP, NF1), /* SDCARD_D2 */ PAD_CFG_NF(GPIO_176, UP_20K, DEEP, NF1), /* SDCARD_D3 */ /* Card detect is active LOW with external pull up. */ - PAD_CFG_NF(GPIO_177, NONE, DEEP, NF1), /* SDCARD_CD_N */ + PAD_CFG_GPI_GPIO_DRIVER(GPIO_177, NONE, DEEP), /* SDCARD_CD_N */ PAD_CFG_NF(GPIO_178, UP_20K, DEEP, NF1), /* SDCARD_CMD */ /* CLK feedback, internal signal, needs 20K pull down */ PAD_CFG_NF(GPIO_179, DN_20K, DEEP, NF1), /* SDCARD_CLK_FB */ diff --git a/src/mainboard/google/reef/variants/pyro/devicetree.cb b/src/mainboard/google/reef/variants/pyro/devicetree.cb index 808ed2c4e7..5bfe2c20f0 100644 --- a/src/mainboard/google/reef/variants/pyro/devicetree.cb +++ b/src/mainboard/google/reef/variants/pyro/devicetree.cb @@ -17,6 +17,9 @@ chip soc/intel/apollolake # If the Board does not have PERST_0, assign GPIO_PRT0_UDEF register "prt0_gpio" = "GPIO_122" + # GPIO for SD card detect + register "sdcard_cd_gpio" = "GPIO_177" + # EMMC TX DATA Delay 1 # Refer to EDS-Vol2-22.3. # [14:8] steps of delay for HS400, each 125ps. diff --git a/src/mainboard/google/reef/variants/snappy/devicetree.cb b/src/mainboard/google/reef/variants/snappy/devicetree.cb index 2b47c5727d..cf3e4dfe08 100644 --- a/src/mainboard/google/reef/variants/snappy/devicetree.cb +++ b/src/mainboard/google/reef/variants/snappy/devicetree.cb @@ -17,6 +17,9 @@ chip soc/intel/apollolake # If the Board does not have PERST_0, assign GPIO_PRT0_UDEF register "prt0_gpio" = "GPIO_122" + # GPIO for SD card detect + register "sdcard_cd_gpio" = "GPIO_177" + # EMMC TX DATA Delay 1 # Refer to EDS-Vol2-22.3. # [14:8] steps of delay for HS400, each 125ps. |