summaryrefslogtreecommitdiff
path: root/src
diff options
context:
space:
mode:
authorLee Leahy <leroy.p.leahy@intel.com>2016-08-01 13:55:02 -0700
committerLee Leahy <leroy.p.leahy@intel.com>2016-08-03 06:17:31 +0200
commit806fa2463f16d32f98cff6437576a5efe2874ece (patch)
treee9dca00709c6c7033d610e83e4b5d0c4efc20736 /src
parent9671faa497f1b2be70e5638c53878c4b9cdd9a25 (diff)
downloadcoreboot-806fa2463f16d32f98cff6437576a5efe2874ece.tar.xz
drivers/intel/fsp2_0: Handle FspNotify calls
Other SOC platforms need to handle the FspNotify calls in the same way as Apollo Lake. Migrate the FspNotify calls into the FSP 2.0 driver. Provide a platform callback to handle anything else that needs to be done after the FspNotify call. Display the MTRRs before the first call to fsp_notify. TEST=Build and run on Galileo Gen2 Change-Id: I1ff327d77516d4ea212740c16c2514c2908758a2 Signed-off-by: Lee Leahy <leroy.p.leahy@intel.com> Reviewed-on: https://review.coreboot.org/15855 Tested-by: build bot (Jenkins) Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Diffstat (limited to 'src')
-rw-r--r--src/drivers/intel/fsp2_0/include/fsp/api.h4
-rw-r--r--src/drivers/intel/fsp2_0/notify.c32
-rw-r--r--src/soc/intel/apollolake/chip.c21
3 files changed, 37 insertions, 20 deletions
diff --git a/src/drivers/intel/fsp2_0/include/fsp/api.h b/src/drivers/intel/fsp2_0/include/fsp/api.h
index 1348ead484..a6228f2264 100644
--- a/src/drivers/intel/fsp2_0/include/fsp/api.h
+++ b/src/drivers/intel/fsp2_0/include/fsp/api.h
@@ -62,12 +62,14 @@ enum fsp_notify_phase {
/* Main FSP stages */
void fsp_memory_init(bool s3wake);
void fsp_silicon_init(void);
-void fsp_notify(enum fsp_notify_phase phase);
/* Callbacks for updating stage-specific parameters */
void platform_fsp_memory_init_params_cb(struct FSPM_UPD *mupd);
void platform_fsp_silicon_init_params_cb(struct FSPS_UPD *supd);
+/* Callback after processing FSP notify */
+void platform_fsp_notify_status(enum fsp_notify_phase phase);
+
/*
* # DOCUMENTATION:
*
diff --git a/src/drivers/intel/fsp2_0/notify.c b/src/drivers/intel/fsp2_0/notify.c
index 880c44d83e..9879de024d 100644
--- a/src/drivers/intel/fsp2_0/notify.c
+++ b/src/drivers/intel/fsp2_0/notify.c
@@ -11,13 +11,15 @@
*/
#include <arch/cpu.h>
+#include <bootstate.h>
#include <console/console.h>
#include <fsp/api.h>
#include <fsp/util.h>
+#include <soc/intel/common/util.h>
#include <string.h>
#include <timestamp.h>
-void fsp_notify(enum fsp_notify_phase phase)
+static void fsp_notify(enum fsp_notify_phase phase)
{
enum fsp_status ret;
fsp_notify_fn fspnotify;
@@ -55,4 +57,32 @@ void fsp_notify(enum fsp_notify_phase phase)
printk(BIOS_SPEW, "FspNotify returned 0x%08x\n", ret);
die("FspNotify returned an error!\n");
}
+
+ /* Allow the platform to run something after FspNotify */
+ platform_fsp_notify_status(phase);
+}
+
+static void fsp_notify_dummy(void *arg)
+{
+ enum fsp_notify_phase phase = (uint32_t)arg;
+
+ /* Display the MTRRs */
+ if (IS_ENABLED(CONFIG_DISPLAY_MTRRS))
+ soc_display_mtrrs();
+
+ fsp_notify(phase);
+ if (phase == READY_TO_BOOT)
+ fsp_notify(END_OF_FIRMWARE);
+}
+
+BOOT_STATE_INIT_ENTRY(BS_DEV_RESOURCES, BS_ON_EXIT, fsp_notify_dummy,
+ (void *) AFTER_PCI_ENUM);
+BOOT_STATE_INIT_ENTRY(BS_PAYLOAD_LOAD, BS_ON_EXIT, fsp_notify_dummy,
+ (void *) READY_TO_BOOT);
+BOOT_STATE_INIT_ENTRY(BS_OS_RESUME, BS_ON_ENTRY, fsp_notify_dummy,
+ (void *) READY_TO_BOOT);
+
+__attribute__((weak)) void platform_fsp_notify_status(
+ enum fsp_notify_phase phase)
+{
}
diff --git a/src/soc/intel/apollolake/chip.c b/src/soc/intel/apollolake/chip.c
index 812f663bfe..345d7c4446 100644
--- a/src/soc/intel/apollolake/chip.c
+++ b/src/soc/intel/apollolake/chip.c
@@ -406,28 +406,13 @@ struct chip_operations soc_intel_apollolake_ops = {
.final = &soc_final
};
-static void fsp_notify_dummy(void *arg)
+void platform_fsp_notify_status(enum fsp_notify_phase phase)
{
-
- enum fsp_notify_phase ph = (enum fsp_notify_phase) arg;
-
- fsp_notify(ph);
-
- /* Call END_OF_FIRMWARE Notify after READY_TO_BOOT Notify */
- if (ph == READY_TO_BOOT) {
- fsp_notify_dummy((void *)END_OF_FIRMWARE);
- /* Hide the P2SB device to align with previous behavior. */
+ /* Hide the P2SB device to align with previous behavior. */
+ if (phase == END_OF_FIRMWARE)
p2sb_hide();
- }
}
-BOOT_STATE_INIT_ENTRY(BS_DEV_RESOURCES, BS_ON_EXIT, fsp_notify_dummy,
- (void *) AFTER_PCI_ENUM);
-BOOT_STATE_INIT_ENTRY(BS_PAYLOAD_LOAD, BS_ON_EXIT, fsp_notify_dummy,
- (void *) READY_TO_BOOT);
-BOOT_STATE_INIT_ENTRY(BS_OS_RESUME, BS_ON_ENTRY, fsp_notify_dummy,
- (void *) READY_TO_BOOT);
-
/*
* spi_init() needs to run unconditionally on every boot (including resume) to
* allow write protect to be disabled for eventlog and nvram updates. This needs