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authorKyösti Mälkki <kyosti.malkki@gmail.com>2019-09-12 15:41:32 +0300
committerKyösti Mälkki <kyosti.malkki@gmail.com>2019-09-13 19:28:36 +0000
commit80f963ccd5989d56caee7563778705d9bfd12275 (patch)
tree9c041a31ac4c78cb015d9ca4b1d65c1eb2adfa82 /src
parente9dcc7a3c52a3bdfa172d308a18fb7f3875f644b (diff)
downloadcoreboot-80f963ccd5989d56caee7563778705d9bfd12275.tar.xz
intel/haswell: Remove some __PRE_RAM__ use
Change-Id: I167e9a171af4fe7997ebb76cdfa22a4578817a55 Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/35380 Reviewed-by: Aaron Durbin <adurbin@chromium.org> Reviewed-by: Furquan Shaikh <furquan@google.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src')
-rw-r--r--src/cpu/intel/haswell/haswell.h12
1 files changed, 1 insertions, 11 deletions
diff --git a/src/cpu/intel/haswell/haswell.h b/src/cpu/intel/haswell/haswell.h
index f786caf3ab..4c67ba82ab 100644
--- a/src/cpu/intel/haswell/haswell.h
+++ b/src/cpu/intel/haswell/haswell.h
@@ -130,9 +130,6 @@
# error "CONFIG_IED_REGION_SIZE is not a power of 2"
#endif
-#if !defined(__ROMCC__) // FIXME romcc should handle below constructs
-
-#if defined(__PRE_RAM__)
struct pei_data;
struct rcba_config_instruction;
struct romstage_params {
@@ -142,18 +139,13 @@ struct romstage_params {
void (*copy_spd)(struct pei_data *);
};
void romstage_common(const struct romstage_params *params);
-#endif
-#ifdef __SMM__
/* Lock MSRs */
void intel_cpu_haswell_finalize_smm(void);
-#else
+
/* Configure power limits for turbo mode */
void set_power_limits(u8 power_limit_1_time);
int cpu_config_tdp_levels(void);
-/* Determine if HyperThreading is disabled. The variable is not valid until
- * setup_ap_init() has been called. */
-#endif
/* CPU identification */
int haswell_family_model(void);
@@ -161,5 +153,3 @@ int haswell_stepping(void);
int haswell_is_ult(void);
#endif
-
-#endif