summaryrefslogtreecommitdiff
path: root/src
diff options
context:
space:
mode:
authorAaron Durbin <adurbin@chromium.org>2016-10-28 17:32:24 -0500
committerAaron Durbin <adurbin@chromium.org>2016-10-31 19:34:20 +0100
commit8cd723bc0cb64f28b1009fd2fa55f6680a402b61 (patch)
tree97aad8d8164e39d12b0c710f6a16b59950a367c7 /src
parent9a2790e328c4cabefa201995aa4812be414d93c3 (diff)
downloadcoreboot-8cd723bc0cb64f28b1009fd2fa55f6680a402b61.tar.xz
lib/prog_loaders: use common ramstage_cache_invalid()
All current implementations of ramstage_cache_invalid() were just resetting the system based on the RESET_ON_INVALID_RAMSTAGE_CACHE Kconfig option. Move that behavior to a single implementation within prog_loaders.c which removes duplication. Change-Id: I67aae73f9e1305732f90d947fe57c5aaf66ada9e Signed-off-by: Aaron Durbin <adurbin@chromium.org> Reviewed-on: https://review.coreboot.org/17184 Tested-by: build bot (Jenkins) Reviewed-by: Duncan Laurie <dlaurie@chromium.org> Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net> Reviewed-by: Furquan Shaikh <furquan@google.com>
Diffstat (limited to 'src')
-rw-r--r--src/cpu/intel/haswell/romstage.c10
-rw-r--r--src/drivers/intel/fsp1_1/romstage.c7
-rw-r--r--src/drivers/intel/fsp2_0/stage_cache.c7
-rw-r--r--src/include/program_loading.h3
-rw-r--r--src/lib/prog_loaders.c11
-rw-r--r--src/soc/intel/baytrail/romstage/romstage.c8
-rw-r--r--src/soc/intel/broadwell/romstage/romstage.c8
7 files changed, 10 insertions, 44 deletions
diff --git a/src/cpu/intel/haswell/romstage.c b/src/cpu/intel/haswell/romstage.c
index 8b62d43e2b..f823c55b0c 100644
--- a/src/cpu/intel/haswell/romstage.c
+++ b/src/cpu/intel/haswell/romstage.c
@@ -264,13 +264,3 @@ void asmlinkage romstage_after_car(void)
/* Load the ramstage. */
run_ramstage();
}
-
-
-#if IS_ENABLED(CONFIG_CACHE_RELOCATED_RAMSTAGE_OUTSIDE_CBMEM)
-void ramstage_cache_invalid(void)
-{
-#if CONFIG_RESET_ON_INVALID_RAMSTAGE_CACHE
- reset_system();
-#endif
-}
-#endif
diff --git a/src/drivers/intel/fsp1_1/romstage.c b/src/drivers/intel/fsp1_1/romstage.c
index a95e5e602e..97379b2231 100644
--- a/src/drivers/intel/fsp1_1/romstage.c
+++ b/src/drivers/intel/fsp1_1/romstage.c
@@ -380,13 +380,6 @@ __attribute__((weak)) void raminit(struct romstage_params *params)
die("ERROR - No RAM initialization specified!\n");
}
-void ramstage_cache_invalid(void)
-{
- if (IS_ENABLED(CONFIG_RESET_ON_INVALID_RAMSTAGE_CACHE))
- /* Perform cold reset on invalid ramstage cache. */
- hard_reset();
-}
-
/* Display the memory configuration */
__attribute__((weak)) void report_memory_config(void)
{
diff --git a/src/drivers/intel/fsp2_0/stage_cache.c b/src/drivers/intel/fsp2_0/stage_cache.c
index 4469a7f3b5..434eae944a 100644
--- a/src/drivers/intel/fsp2_0/stage_cache.c
+++ b/src/drivers/intel/fsp2_0/stage_cache.c
@@ -28,10 +28,3 @@ void stage_cache_external_region(void **base, size_t *size)
*size = 0;
}
}
-
-void ramstage_cache_invalid(void)
-{
- if (IS_ENABLED(CONFIG_RESET_ON_INVALID_RAMSTAGE_CACHE))
- /* Perform cold reset on invalid ramstage cache. */
- hard_reset();
-}
diff --git a/src/include/program_loading.h b/src/include/program_loading.h
index 3958fda41c..08687f3128 100644
--- a/src/include/program_loading.h
+++ b/src/include/program_loading.h
@@ -167,9 +167,6 @@ void run_romstage(void);
/* Run ramstage from romstage. */
void run_ramstage(void);
-/* Called when the stage cache couldn't load ramstage on resume. */
-void ramstage_cache_invalid(void);
-
/* Determine where stack for ramstage loader is located. */
enum { ROMSTAGE_STACK_CBMEM, ROMSTAGE_STACK_LOW_MEM };
uintptr_t romstage_ram_stack_base(size_t size, int src);
diff --git a/src/lib/prog_loaders.c b/src/lib/prog_loaders.c
index c0dcd60d61..09933ae70c 100644
--- a/src/lib/prog_loaders.c
+++ b/src/lib/prog_loaders.c
@@ -22,6 +22,7 @@
#include <halt.h>
#include <lib.h>
#include <program_loading.h>
+#include <reset.h>
#include <romstage_handoff.h>
#include <rmodule.h>
#include <rules.h>
@@ -74,7 +75,15 @@ void __attribute__((weak)) stage_cache_add(int stage_id,
const struct prog *stage) {}
void __attribute__((weak)) stage_cache_load_stage(int stage_id,
struct prog *stage) {}
-void __attribute__((weak)) ramstage_cache_invalid(void) {}
+
+static void ramstage_cache_invalid(void)
+{
+ printk(BIOS_ERR, "ramstage cache invalid.\n");
+ if (IS_ENABLED(CONFIG_RESET_ON_INVALID_RAMSTAGE_CACHE)) {
+ hard_reset();
+ halt();
+ }
+}
static void run_ramstage_from_resume(struct romstage_handoff *handoff,
struct prog *ramstage)
diff --git a/src/soc/intel/baytrail/romstage/romstage.c b/src/soc/intel/baytrail/romstage/romstage.c
index 2b5174435b..9cf110e336 100644
--- a/src/soc/intel/baytrail/romstage/romstage.c
+++ b/src/soc/intel/baytrail/romstage/romstage.c
@@ -333,14 +333,6 @@ static void *setup_stack_and_mttrs(void)
return slot;
}
-void ramstage_cache_invalid(void)
-{
-#if CONFIG_RESET_ON_INVALID_RAMSTAGE_CACHE
- /* Perform cold reset on invalid ramstage cache. */
- cold_reset();
-#endif
-}
-
int get_sw_write_protect_state(void)
{
u8 status;
diff --git a/src/soc/intel/broadwell/romstage/romstage.c b/src/soc/intel/broadwell/romstage/romstage.c
index f2b28a5a10..44df88cab2 100644
--- a/src/soc/intel/broadwell/romstage/romstage.c
+++ b/src/soc/intel/broadwell/romstage/romstage.c
@@ -133,14 +133,6 @@ void asmlinkage romstage_after_car(void)
while (1);
}
-void ramstage_cache_invalid(void)
-{
-#if CONFIG_RESET_ON_INVALID_RAMSTAGE_CACHE
- /* Perform cold reset on invalid ramstage cache. */
- reset_system();
-#endif
-}
-
int get_sw_write_protect_state(void)
{
u8 status;