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authorJulius Werner <jwerner@chromium.org>2016-08-25 22:37:38 -0700
committerPatrick Georgi <pgeorgi@google.com>2016-10-04 21:14:52 +0200
commita02e4a0428b943a7a92036c03e374e1ca8a27446 (patch)
treec612b919141c5c1bfdecedf763ee0db33a17fae8 /src
parentffcc07dbad4273ec53331d5aa24a336b7e78b73f (diff)
downloadcoreboot-a02e4a0428b943a7a92036c03e374e1ca8a27446.tar.xz
rockchip/rk3399: Remove CONFIG_ARM64_A53_ERRATUM_843419
As far as I know, the Cortex-A53 cores in RK3399 are of a newer revision that is not affected by ARM erratum 843419. If it was, the workaround would also need to be enabled in libpayload and Chrome OS userspace, which it currently isn't. I assume this was just incorrectly copied over from another SoC and we can safely remove it. BRANCH=None BUG=chrome-os-partner:56700 TEST=Booted Kevin. Change-Id: I5b1534c954a6d985499b481738723cabbdc07253 Signed-off-by: Patrick Georgi <pgeorgi@chromium.org> Original-Commit-Id: 4891cc866583532ee3dcb1a5ad5b81670eb0743d Original-Change-Id: Iadb57428f8727ce0e563204723644e2c79e3007c Original-Signed-off-by: Julius Werner <jwerner@chromium.org> Original-Reviewed-on: https://chromium-review.googlesource.com/376363 Original-Commit-Queue: Douglas Anderson <dianders@chromium.org> Original-Reviewed-by: Douglas Anderson <dianders@chromium.org> Reviewed-on: https://review.coreboot.org/16702 Tested-by: build bot (Jenkins) Reviewed-by: Martin Roth <martinroth@google.com> Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Diffstat (limited to 'src')
-rw-r--r--src/soc/rockchip/rk3399/Kconfig1
1 files changed, 0 insertions, 1 deletions
diff --git a/src/soc/rockchip/rk3399/Kconfig b/src/soc/rockchip/rk3399/Kconfig
index 1eaa87019e..b4017c8856 100644
--- a/src/soc/rockchip/rk3399/Kconfig
+++ b/src/soc/rockchip/rk3399/Kconfig
@@ -5,7 +5,6 @@ config SOC_ROCKCHIP_RK3399
select ARCH_RAMSTAGE_ARMV8_64
select ARCH_ROMSTAGE_ARMV8_64
select ARCH_VERSTAGE_ARMV8_64
- select ARM64_A53_ERRATUM_843419
select ARM64_USE_ARM_TRUSTED_FIRMWARE
select BOOTBLOCK_CONSOLE
select DRIVERS_UART_8250MEM_32