diff options
| author | Elyes HAOUAS <ehaouas@noos.fr> | 2018-06-30 10:39:24 +0200 |
|---|---|---|
| committer | Patrick Georgi <pgeorgi@google.com> | 2018-07-12 11:52:52 +0000 |
| commit | a4fc7bef7ffab0ed5f2bcd2d9b439dc4e49bd016 (patch) | |
| tree | 4d636a1aa3c2b2c8569084d917e1a1bd5142fb00 /src | |
| parent | 34510c377e81e7c4a9985e5690b7358f9b0568fb (diff) | |
| download | coreboot-a4fc7bef7ffab0ed5f2bcd2d9b439dc4e49bd016.tar.xz | |
nb/i945/raminit: Correct C0DRAMW & C1DRAMW for 4 DIMMs
Change-Id: Ib1f999447b37a1524d589552ea2eec640c2a2c7e
Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr>
Reviewed-on: https://review.coreboot.org/18387
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Patrick Rudolph <siro@das-labor.org>
Diffstat (limited to 'src')
| -rw-r--r-- | src/northbridge/intel/i945/raminit.c | 67 |
1 files changed, 37 insertions, 30 deletions
diff --git a/src/northbridge/intel/i945/raminit.c b/src/northbridge/intel/i945/raminit.c index d7a349ffc4..c259530338 100644 --- a/src/northbridge/intel/i945/raminit.c +++ b/src/northbridge/intel/i945/raminit.c @@ -629,43 +629,50 @@ static void sdram_get_dram_configuration(struct sys_info *sysinfo) static void sdram_program_dram_width(struct sys_info *sysinfo) { u16 c0dramw = 0, c1dramw = 0; - int idx; + int i, idx; if (sysinfo->dual_channel) idx = 2; else idx = 1; - switch (sysinfo->dimm[0]) { - case SYSINFO_DIMM_X16DS: - c0dramw = 0x0000; break; - case SYSINFO_DIMM_X8DS: - c0dramw = 0x0001; break; - case SYSINFO_DIMM_X16SS: - c0dramw = 0x0000; break; - case SYSINFO_DIMM_X8DDS: - c0dramw = 0x0005; break; - case SYSINFO_DIMM_NOT_POPULATED: - c0dramw = 0x0000; break; - } - - switch (sysinfo->dimm[idx]) { - case SYSINFO_DIMM_X16DS: - c1dramw = 0x0000; break; - case SYSINFO_DIMM_X8DS: - c1dramw = 0x0010; break; - case SYSINFO_DIMM_X16SS: - c1dramw = 0x0000; break; - case SYSINFO_DIMM_X8DDS: - c1dramw = 0x0050; break; - case SYSINFO_DIMM_NOT_POPULATED: - c1dramw = 0x0000; break; + for (i = 0; i < DIMM_SOCKETS; i++) { /* Channel 0 */ + switch (sysinfo->dimm[i]) { + case SYSINFO_DIMM_X16DS: + c0dramw |= (0x0000) << 4*(i % 2); + break; + case SYSINFO_DIMM_X8DS: + c0dramw |= (0x0001) << 4*(i % 2); + break; + case SYSINFO_DIMM_X16SS: + c0dramw |= (0x0000) << 4*(i % 2); + break; + case SYSINFO_DIMM_X8DDS: + c0dramw |= (0x0005) << 4*(i % 2); + break; + case SYSINFO_DIMM_NOT_POPULATED: + c0dramw |= (0x0000) << 4*(i % 2); + break; + } } - - if (!sdram_capabilities_dual_channel()) { - /* Single Channel */ - c0dramw |= c1dramw; - c1dramw = 0; + for (i = DIMM_SOCKETS; i < idx * DIMM_SOCKETS; i++) { /* Channel 1 */ + switch (sysinfo->dimm[i]) { + case SYSINFO_DIMM_X16DS: + c1dramw |= (0x0000) << 4*(i % 2); + break; + case SYSINFO_DIMM_X8DS: + c1dramw |= (0x0001) << 4*(i % 2); + break; + case SYSINFO_DIMM_X16SS: + c1dramw |= (0x0000) << 4*(i % 2); + break; + case SYSINFO_DIMM_X8DDS: + c1dramw |= (0x0005) << 4*(i % 2); + break; + case SYSINFO_DIMM_NOT_POPULATED: + c1dramw |= (0x0000) << 4*(i % 2); + break; + } } MCHBAR16(C0DRAMW) = c0dramw; |