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| author | Werner Zeh <werner.zeh@siemens.com> | 2016-07-07 07:10:50 +0200 |
|---|---|---|
| committer | Werner Zeh <werner.zeh@siemens.com> | 2016-07-08 08:36:53 +0200 |
| commit | a845f427fee1f0870b7b673a0675ba04408bea57 (patch) | |
| tree | 46fb339f82404930009f16c34f50ce7f642907db /src | |
| parent | 8d3c4d1bb39fa354df59abf55b37fc694a2cb7c9 (diff) | |
| download | coreboot-a845f427fee1f0870b7b673a0675ba04408bea57.tar.xz | |
siemens/mc_bdx1: Move SCI to IRQ 10
IRQ 9 is used for different purpose on this board so move
SCI away to IRQ10.
Change-Id: I107bfb5ec8cd05f844ee75550779be7746e77a88
Signed-off-by: Werner Zeh <werner.zeh@siemens.com>
Reviewed-on: https://review.coreboot.org/15563
Tested-by: build bot (Jenkins)
Reviewed-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Diffstat (limited to 'src')
| -rw-r--r-- | src/mainboard/siemens/mc_bdx1/irqroute.h | 2 | ||||
| -rw-r--r-- | src/mainboard/siemens/mc_bdx1/mainboard.c | 14 |
2 files changed, 15 insertions, 1 deletions
diff --git a/src/mainboard/siemens/mc_bdx1/irqroute.h b/src/mainboard/siemens/mc_bdx1/irqroute.h index c3911be75b..3b437fee55 100644 --- a/src/mainboard/siemens/mc_bdx1/irqroute.h +++ b/src/mainboard/siemens/mc_bdx1/irqroute.h @@ -33,7 +33,7 @@ /* * Route each PIRQ[A-H] to a PIC IRQ[0-15] * Reserved: 0, 1, 2, 8, 13 - * ACPI/SCI: 9 + * ACPI/SCI: 10 */ #define PIRQ_PIC_ROUTES \ PIRQ_PIC(A, 5), \ diff --git a/src/mainboard/siemens/mc_bdx1/mainboard.c b/src/mainboard/siemens/mc_bdx1/mainboard.c index bad072b96e..8a5226b09f 100644 --- a/src/mainboard/siemens/mc_bdx1/mainboard.c +++ b/src/mainboard/siemens/mc_bdx1/mainboard.c @@ -32,6 +32,7 @@ #include <hwilib.h> #include <i210.h> #include <soc/pci_devs.h> +#include <soc/irq.h> #define MAX_PATH_DEPTH 12 #define MAX_NUM_MAPPINGS 10 @@ -91,6 +92,18 @@ static void mainboard_enable(device_t dev) } +static void mainboard_init(void *chip_info) +{ + uint8_t actl = 0; + device_t dev = dev_find_slot(0, PCI_DEVFN(LPC_DEV, LPC_FUNC)); + + /* Route SCI to IRQ 10 to free IRQ 9 slot. */ + actl = pci_read_config8(dev, ACPI_CNTL_OFFSET); + actl &= ~SCIS_MASK; + actl |= SCIS_IRQ10; + pci_write_config8(dev, ACPI_CNTL_OFFSET, actl); +} + static void mainboard_final(void *chip_info) { void *spi_base = NULL; @@ -183,5 +196,6 @@ enum cb_err mainboard_get_mac_address(struct device *dev, uint8_t mac[6]) struct chip_operations mainboard_ops = { .enable_dev = mainboard_enable, + .init = mainboard_init, .final = mainboard_final }; |