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authorKyösti Mälkki <kyosti.malkki@gmail.com>2018-06-25 15:38:45 +0300
committerKyösti Mälkki <kyosti.malkki@gmail.com>2018-06-27 02:20:11 +0000
commita8c0cb35121c30120f032ecbd0de172540db8a6c (patch)
treeb304fab5a1695ed59a3a89e663b038e2a99bd20b /src
parente0058e89ab94ef7ef366c596d3e03ad693694d2a (diff)
downloadcoreboot-a8c0cb35121c30120f032ecbd0de172540db8a6c.tar.xz
stage_cache: Disable when APCI S3 is not possible
Don't consume CBMEM for stage cache when we would never use it. Change-Id: I606e0457ff3085822554c4041fc56f0d28cc9c2d Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com> Reviewed-on: https://review.coreboot.org/27230 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Diffstat (limited to 'src')
-rw-r--r--src/Kconfig1
-rw-r--r--src/lib/prog_loaders.c3
2 files changed, 3 insertions, 1 deletions
diff --git a/src/Kconfig b/src/Kconfig
index 875c9d0790..24b21060b6 100644
--- a/src/Kconfig
+++ b/src/Kconfig
@@ -1152,6 +1152,7 @@ config RELOCATABLE_MODULES
config NO_STAGE_CACHE
bool
+ default y if !HAVE_ACPI_RESUME
help
Do not save any component in stage cache for resume path. On resume,
all components would be read back from CBFS again.
diff --git a/src/lib/prog_loaders.c b/src/lib/prog_loaders.c
index 02b6590aac..1c192d1f8b 100644
--- a/src/lib/prog_loaders.c
+++ b/src/lib/prog_loaders.c
@@ -154,7 +154,8 @@ void run_ramstage(void)
} else if (load_nonrelocatable_ramstage(&ramstage))
goto fail;
- stage_cache_add(STAGE_RAMSTAGE, &ramstage);
+ if (!IS_ENABLED(CONFIG_NO_STAGE_CACHE))
+ stage_cache_add(STAGE_RAMSTAGE, &ramstage);
timestamp_add_now(TS_END_COPYRAM);