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authorNico Huber <nico.h@gmx.de>2017-10-01 18:14:43 +0200
committerNico Huber <nico.h@gmx.de>2017-10-03 12:37:23 +0000
commitac4f21631be94b18b9618bf909e50c3ba534149f (patch)
treef0be32207a0cc823748e9968e0c4754b70f0e7c3 /src
parentf824784a20a23c64bae6c53d4744fbd8a7cb5c22 (diff)
downloadcoreboot-ac4f21631be94b18b9618bf909e50c3ba534149f.tar.xz
nb/intel/sandybridge: Refactor dram_dimm_mapping()
Remove no-op statements and code-rephrasing comments, apply some cosmetic changes to improve readability. Change-Id: I124a6bc338c2589fab66ca91bf53139b4413d10b Signed-off-by: Nico Huber <nico.h@gmx.de> Reviewed-on: https://review.coreboot.org/21823 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Arthur Heymans <arthur@aheymans.xyz>
Diffstat (limited to 'src')
-rw-r--r--src/northbridge/intel/sandybridge/raminit_common.c42
1 files changed, 16 insertions, 26 deletions
diff --git a/src/northbridge/intel/sandybridge/raminit_common.c b/src/northbridge/intel/sandybridge/raminit_common.c
index 3e69f4da72..b7340362c5 100644
--- a/src/northbridge/intel/sandybridge/raminit_common.c
+++ b/src/northbridge/intel/sandybridge/raminit_common.c
@@ -295,49 +295,39 @@ void dram_timing_regs(ramctr_timing *ctrl)
void dram_dimm_mapping(ramctr_timing *ctrl)
{
- u32 reg, val32;
int channel;
dimm_info *info = &ctrl->info;
FOR_ALL_CHANNELS {
- dimm_attr *dimmA = 0;
- dimm_attr *dimmB = 0;
- reg = 0;
- val32 = 0;
+ dimm_attr *dimmA, *dimmB;
+ u32 reg = 0;
+
if (info->dimm[channel][0].size_mb >=
info->dimm[channel][1].size_mb) {
- // dimm 0 is bigger, set it to dimmA
dimmA = &info->dimm[channel][0];
dimmB = &info->dimm[channel][1];
- reg |= (0 << 16);
+ reg |= 0 << 16;
} else {
- // dimm 1 is bigger, set it to dimmA
dimmA = &info->dimm[channel][1];
dimmB = &info->dimm[channel][0];
- reg |= (1 << 16);
+ reg |= 1 << 16;
}
- // dimmA
+
if (dimmA && (dimmA->ranks > 0)) {
- val32 = dimmA->size_mb / 256;
- reg = (reg & ~0xff) | val32;
- val32 = dimmA->ranks - 1;
- reg = (reg & ~0x20000) | (val32 << 17);
- val32 = (dimmA->width / 8) - 1;
- reg = (reg & ~0x80000) | (val32 << 19);
+ reg |= dimmA->size_mb / 256;
+ reg |= (dimmA->ranks - 1) << 17;
+ reg |= (dimmA->width / 8 - 1) << 19;
}
- // dimmB
+
if (dimmB && (dimmB->ranks > 0)) {
- val32 = dimmB->size_mb / 256;
- reg = (reg & ~0xff00) | (val32 << 8);
- val32 = dimmB->ranks - 1;
- reg = (reg & ~0x40000) | (val32 << 18);
- val32 = (dimmB->width / 8) - 1;
- reg = (reg & ~0x100000) | (val32 << 20);
+ reg |= (dimmB->size_mb / 256) << 8;
+ reg |= (dimmB->ranks - 1) << 18;
+ reg |= (dimmB->width / 8 - 1) << 20;
}
- reg = (reg & ~0x200000) | (1 << 21); // rank interleave
- reg = (reg & ~0x400000) | (1 << 22); // enhanced interleave
- // Save MAD-DIMM register
+ reg |= 1 << 21; /* rank interleave */
+ reg |= 1 << 22; /* enhanced interleave */
+
if ((dimmA && (dimmA->ranks > 0))
|| (dimmB && (dimmB->ranks > 0))) {
ctrl->mad_dimm[channel] = reg;