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authorJagadish Krishnamoorthy <jagadish.krishnamoorthy@intel.com>2015-11-04 14:25:15 -0800
committerMartin Roth <martinroth@google.com>2016-01-28 20:35:35 +0100
commitc68163811680caf998e85a5005065183aa1a80a7 (patch)
tree1d23a5f973e94ea7c8eae154cad6b422a387e81a /src
parent1d03f368874b37fb116937b2997844362057cca6 (diff)
downloadcoreboot-c68163811680caf998e85a5005065183aa1a80a7.tar.xz
intel/strago: Enable native mode on sd card cd line
Configuring Native Mode enables the card present bit in sd card controller register. TEST=Sd Card Plug/Unplug should work in OS and DepthCharge. Original-Reviewed-by: Duncan Laurie <dlaurie@chromium.org> Change-Id: I2f017bdd7125f324fb58a88485cd83110851fbc5 Signed-off-by: Jagadish Krishnamoorthy <jagadish.krishnamoorthy@intel.com> Signed-off-by: Hannah Williams <hannah.williams@intel.com> Signed-off-by: Hannah Williams <hannah.williams@intel.com> Reviewed-on: https://review.coreboot.org/12741 Tested-by: build bot (Jenkins) Reviewed-by: Martin Roth <martinroth@google.com>
Diffstat (limited to 'src')
-rwxr-xr-xsrc/mainboard/intel/strago/gpio.c3
1 files changed, 1 insertions, 2 deletions
diff --git a/src/mainboard/intel/strago/gpio.c b/src/mainboard/intel/strago/gpio.c
index b18ad97803..47588fc17e 100755
--- a/src/mainboard/intel/strago/gpio.c
+++ b/src/mainboard/intel/strago/gpio.c
@@ -74,8 +74,7 @@ static const struct soc_gpio_map gpse_gpio_map[] = {
Native_M1, /* 78 SDMMC3_PWR_EN_B */
GPIO_NC, /* 79 GPI ILB_SERIRQ */
Native_M1, /* 80 USB_OC0_B */
- GPI(trig_edge_both, L1, P_20K_H, non_maskable,
- en_edge_detect, NA , NA),
+ NATIVE_INT_PU20K(1, L1), /* 81 SDMMC3_CD_B */
/* 81 SDMMC3_CD_B */
GPIO_NC, /* 82 spkr asummed gpio number */
Native_M1, /* 83 SUSPWRDNACK */