summaryrefslogtreecommitdiff
path: root/src
diff options
context:
space:
mode:
authorChris Zhou <chris_zhou@compal.corp-partner.google.com>2018-09-27 15:28:33 +0800
committerAaron Durbin <adurbin@chromium.org>2018-10-01 15:52:10 +0000
commitc733540bc9c6c6c2819e6058290e10b08be1f0ca (patch)
tree801bc9386af2bf623716d566d9d9c271e5d96567 /src
parent2930a7279703080b10391d9f145bb91c9a72e13a (diff)
downloadcoreboot-c733540bc9c6c6c2819e6058290e10b08be1f0ca.tar.xz
mb/google/octopus: Operate touchpad I2C CLK in spec
Need to tune I2C bus 6 clock frequency under the 400K Hz Bug=b:115600671 TEST=flash coreboot to the DUT and measure I2C bus 6 clock frequency whether arrive to 398.07K Hz Change-Id: I5cc1f67f0db0553cb8424f81408ed4686cddb2fb Signed-off-by: Chris Zhou <chris_zhou@compal.corp-partner.google.com> Reviewed-on: https://review.coreboot.org/28760 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Justin TerAvest <teravest@chromium.org> Reviewed-by: Aaron Durbin <adurbin@chromium.org> Reviewed-by: Furquan Shaikh <furquan@google.com>
Diffstat (limited to 'src')
-rw-r--r--src/mainboard/google/octopus/variants/fleex/overridetree.cb41
1 files changed, 41 insertions, 0 deletions
diff --git a/src/mainboard/google/octopus/variants/fleex/overridetree.cb b/src/mainboard/google/octopus/variants/fleex/overridetree.cb
index 179b8f4a4f..792e0570fa 100644
--- a/src/mainboard/google/octopus/variants/fleex/overridetree.cb
+++ b/src/mainboard/google/octopus/variants/fleex/overridetree.cb
@@ -1,5 +1,46 @@
chip soc/intel/apollolake
+ # Intel Common SoC Config
+ #+-------------------+---------------------------+
+ #| Field | Value |
+ #+-------------------+---------------------------+
+ #| GSPI0 | cr50 TPM. Early init is |
+ #| | required to set up a BAR |
+ #| | for TPM communication |
+ #| | before memory is up |
+ #| I2C5 | Audio |
+ #| I2C6 | Trackpad |
+ #| I2C7 | Touchscreen |
+ #+-------------------+---------------------------+
+
+ register "common_soc_config" = "{
+ .gspi[0] = {
+ .speed_mhz = 1,
+ .early_init = 1,
+ },
+ .i2c[0] = {
+ .speed = I2C_SPEED_FAST,
+ .rise_time_ns = 152,
+ .fall_time_ns = 30,
+ },
+ .i2c[5] = {
+ .speed = I2C_SPEED_FAST,
+ .rise_time_ns = 104,
+ .fall_time_ns = 52,
+ },
+ .i2c[6] = {
+ .speed = I2C_SPEED_FAST,
+ .rise_time_ns = 66,
+ .fall_time_ns = 90,
+ .data_hold_time_ns = 350,
+ },
+ .i2c[7] = {
+ .speed = I2C_SPEED_FAST,
+ .rise_time_ns = 76,
+ .fall_time_ns = 164,
+ },
+ }"
+
device domain 0 on
device pci 16.1 off end # - I2C 1
device pci 17.1 on