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authorMaximilian Thuermer <maximilian.thuermer@ziti.uni-heidelberg.de>2010-03-23 15:58:29 +0000
committerPatrick Georgi <patrick.georgi@coresystems.de>2010-03-23 15:58:29 +0000
commitcadefaf20fb4a32fad6e0da9292a51ab9b862af9 (patch)
tree4a232df4af853bc686958116f2c224420a31f0b1 /src
parent86051f919fc34d731619fc3a1266c5a2c4855b01 (diff)
downloadcoreboot-cadefaf20fb4a32fad6e0da9292a51ab9b862af9.tar.xz
Fix reading HT link offsets.
pci_read_config32 overwrites the real value, use another variable for that. Signed-off-by: Maximilian Thuermer <maximilian.thuermer@ziti.uni-heidelberg.de> Acked-by: Patrick Georgi <patrick.georgi@coresystems.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5277 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
Diffstat (limited to 'src')
-rw-r--r--src/cpu/amd/model_10xxx/init_cpus.c14
1 files changed, 8 insertions, 6 deletions
diff --git a/src/cpu/amd/model_10xxx/init_cpus.c b/src/cpu/amd/model_10xxx/init_cpus.c
index d0458dfed5..0061706e3f 100644
--- a/src/cpu/amd/model_10xxx/init_cpus.c
+++ b/src/cpu/amd/model_10xxx/init_cpus.c
@@ -702,25 +702,27 @@ void AMD_SetupPSIVID_d (u32 platform_type, u8 node)
*/
BOOL AMD_CpuFindCapability (u8 node, u8 cap_count, u8 *offset)
{
+ u32 reg;
u32 val;
/* get start of CPU HT Host Capabilities */
val = pci_read_config32(NODE_PCI(node, 0), 0x34);
- val &= 0xFF;
+ val &= 0xFF; //reg offset of first link
cap_count++;
/* Traverse through the capabilities. */
do {
- val = pci_read_config32(NODE_PCI(node, 0), val);
+ reg = pci_read_config32(NODE_PCI(node, 0), val);
/* Is the capability block a HyperTransport capability block? */
- if ((val & 0xFF) == 0x08) {
+ if ((reg & 0xFF) == 0x08) {
/* Is the HT capability block an HT Host Capability? */
- if ((val & 0xE0000000) == (1 << 29))
+ if ((reg & 0xE0000000) == (1 << 29))
cap_count--;
}
- if (cap_count)
- val = (val >> 8) & 0xFF;
+
+ if(cap_count)
+ val = (reg >> 8) & 0xFF; //update reg offset
} while (cap_count && val);
*offset = (u8) val;