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authorYouness Alaoui <kakaroto@kakaroto.homelinux.net>2017-04-25 11:31:58 -0400
committerMartin Roth <martinroth@google.com>2017-05-01 00:44:15 +0200
commitcc558e622356aca0fd8bae6bbfbb3bacc88ec744 (patch)
treedfe04cc2ebaceedcd0584af693c80788ceacebc4 /src
parent1244a510f11831152cd5a39f42ee47649b1b4945 (diff)
downloadcoreboot-cc558e622356aca0fd8bae6bbfbb3bacc88ec744.tar.xz
purism/librem13: Enable support for M.2 NVMe
Enable/Disable the PCIe ports to match factory BIOS. The port #6 is used for PCIe on the M.2 connector which allows for NVMe SSDs to function. Change-Id: I8058cbad3da651144545d588c0ae78c5f5e598ac Signed-off-by: Youness Alaoui <youness.alaoui@puri.sm> Reviewed-on: https://review.coreboot.org/19446 Tested-by: build bot (Jenkins) Reviewed-by: Arthur Heymans <arthur@aheymans.xyz>
Diffstat (limited to 'src')
-rw-r--r--src/mainboard/purism/librem13/devicetree.cb6
1 files changed, 3 insertions, 3 deletions
diff --git a/src/mainboard/purism/librem13/devicetree.cb b/src/mainboard/purism/librem13/devicetree.cb
index af6641a658..ba38070a55 100644
--- a/src/mainboard/purism/librem13/devicetree.cb
+++ b/src/mainboard/purism/librem13/devicetree.cb
@@ -50,11 +50,11 @@ chip soc/intel/broadwell
device pci 19.0 off end # GbE
device pci 1b.0 on end # High Definition Audio
device pci 1c.0 on end # PCIe Port #1
- device pci 1c.1 on end # PCIe Port #2
+ device pci 1c.1 off end # PCIe Port #2
device pci 1c.2 on end # PCIe Port #3 - LAN
device pci 1c.3 on end # PCIe Port #4 - WiFi
- device pci 1c.4 off end # PCIe Port #5
- device pci 1c.5 off end # PCIe Port #6
+ device pci 1c.4 on end # PCIe Port #5
+ device pci 1c.5 on end # PCIe Port #6 - M.2 NVMe
device pci 1d.0 off end # USB2 EHCI
device pci 1e.0 off end # PCI bridge
device pci 1f.0 on