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authorTim Wawrzynczak <twawrzynczak@chromium.org>2019-05-21 14:00:53 -0600
committerFurquan Shaikh <furquan@google.com>2019-05-31 18:54:04 +0000
commitcdc459e66a3c6b68bae2515120445a10483df7f4 (patch)
treefc8200aa3da64b9e6bdd7dcf32f8f6cb629e695b /src
parenta66c9b8bf4e4db0a108f90c21084ecc25aa87e72 (diff)
downloadcoreboot-cdc459e66a3c6b68bae2515120445a10483df7f4.tar.xz
mb/google/hatch: Create helios variant
Created helios (hatch variant). Currenly copied from kohaku. Helios- specific changes will come later. BUG=b:133182138 BRANCH=none TEST=none Change-Id: I9d151621a1c42e6f3cadb288f7ea476828c059b5 Signed-off-by: Tim Wawrzynczak <twawrzynczak@chromium.org> Reviewed-on: https://review.coreboot.org/c/coreboot/+/32919 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Furquan Shaikh <furquan@google.com> Reviewed-by: Paul Fagerburg <pfagerburg@chromium.org>
Diffstat (limited to 'src')
-rw-r--r--src/mainboard/google/hatch/variants/helios/Makefile.inc20
-rw-r--r--src/mainboard/google/hatch/variants/helios/include/variant/acpi/dptf.asl16
-rw-r--r--src/mainboard/google/hatch/variants/helios/include/variant/ec.h21
-rw-r--r--src/mainboard/google/hatch/variants/helios/include/variant/gpio.h21
-rw-r--r--src/mainboard/google/hatch/variants/helios/overridetree.cb46
5 files changed, 124 insertions, 0 deletions
diff --git a/src/mainboard/google/hatch/variants/helios/Makefile.inc b/src/mainboard/google/hatch/variants/helios/Makefile.inc
new file mode 100644
index 0000000000..cf6ee5ac97
--- /dev/null
+++ b/src/mainboard/google/hatch/variants/helios/Makefile.inc
@@ -0,0 +1,20 @@
+## This file is part of the coreboot project.
+##
+## Copyright 2019 Google LLC
+##
+## This program is free software; you can redistribute it and/or modify
+## it under the terms of the GNU General Public License as published by
+## the Free Software Foundation; version 2 of the License.
+##
+## This program is distributed in the hope that it will be useful,
+## but WITHOUT ANY WARRANTY; without even the implied warranty of
+## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+## GNU General Public License for more details.
+##
+
+SPD_SOURCES = 4G_2400 # 0b000
+SPD_SOURCES += empty_ddr4 # 0b001
+SPD_SOURCES += 8G_2400 # 0b010
+SPD_SOURCES += 8G_2666 # 0b011
+SPD_SOURCES += 16G_2400 # 0b100
+SPD_SOURCES += 16G_2666 # 0b101
diff --git a/src/mainboard/google/hatch/variants/helios/include/variant/acpi/dptf.asl b/src/mainboard/google/hatch/variants/helios/include/variant/acpi/dptf.asl
new file mode 100644
index 0000000000..f1f09438fa
--- /dev/null
+++ b/src/mainboard/google/hatch/variants/helios/include/variant/acpi/dptf.asl
@@ -0,0 +1,16 @@
+/*
+ * This file is part of the coreboot project.
+ *
+ * Copyright 2019 Google LLC
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; version 2 of the License.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ */
+
+#include <baseboard/acpi/dptf.asl>
diff --git a/src/mainboard/google/hatch/variants/helios/include/variant/ec.h b/src/mainboard/google/hatch/variants/helios/include/variant/ec.h
new file mode 100644
index 0000000000..768987d225
--- /dev/null
+++ b/src/mainboard/google/hatch/variants/helios/include/variant/ec.h
@@ -0,0 +1,21 @@
+/*
+ * This file is part of the coreboot project.
+ *
+ * Copyright 2019 Google LLC
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; version 2 of the License.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ */
+
+#ifndef VARIANT_EC_H
+#define VARIANT_EC_H
+
+#include <baseboard/ec.h>
+
+#endif
diff --git a/src/mainboard/google/hatch/variants/helios/include/variant/gpio.h b/src/mainboard/google/hatch/variants/helios/include/variant/gpio.h
new file mode 100644
index 0000000000..d99e2bbd65
--- /dev/null
+++ b/src/mainboard/google/hatch/variants/helios/include/variant/gpio.h
@@ -0,0 +1,21 @@
+/*
+ * This file is part of the coreboot project.
+ *
+ * Copyright 2019 Google LLC
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; version 2 of the License.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.See the
+ * GNU General Public License for more details.
+ */
+
+#ifndef VARIANT_GPIO_H
+#define VARIANT_GPIO_H
+
+#include <baseboard/gpio.h>
+
+#endif
diff --git a/src/mainboard/google/hatch/variants/helios/overridetree.cb b/src/mainboard/google/hatch/variants/helios/overridetree.cb
new file mode 100644
index 0000000000..84f0e29afa
--- /dev/null
+++ b/src/mainboard/google/hatch/variants/helios/overridetree.cb
@@ -0,0 +1,46 @@
+chip soc/intel/cannonlake
+ register "SerialIoDevMode" = "{
+ [PchSerialIoIndexI2C0] = PchSerialIoPci,
+ [PchSerialIoIndexI2C1] = PchSerialIoPci,
+ [PchSerialIoIndexI2C2] = PchSerialIoPci,
+ [PchSerialIoIndexI2C3] = PchSerialIoPci,
+ [PchSerialIoIndexI2C4] = PchSerialIoPci,
+ [PchSerialIoIndexI2C5] = PchSerialIoPci,
+ [PchSerialIoIndexSPI0] = PchSerialIoPci,
+ [PchSerialIoIndexSPI1] = PchSerialIoPci,
+ [PchSerialIoIndexSPI2] = PchSerialIoDisabled,
+ [PchSerialIoIndexUART0] = PchSerialIoSkipInit,
+ [PchSerialIoIndexUART1] = PchSerialIoDisabled,
+ [PchSerialIoIndexUART2] = PchSerialIoDisabled,
+ }"
+
+ # Intel Common SoC Config
+ #+-------------------+---------------------------+
+ #| Field | Value |
+ #+-------------------+---------------------------+
+ #| I2C0 | Trackpad |
+ #| I2C1 | Touchscreen |
+ #| I2C2 | Digitizer |
+ #| I2C4 | Audio |
+ #+-------------------+---------------------------+
+ register "common_soc_config" = "{
+ .i2c[0] = {
+ .speed = I2C_SPEED_FAST,
+ },
+ .i2c[1] = {
+ .speed = I2C_SPEED_FAST,
+ },
+ .i2c[2] = {
+ .speed = I2C_SPEED_FAST,
+ },
+ .i2c[4] = {
+ .speed = I2C_SPEED_FAST,
+ },
+ .gspi[0] = {
+ .speed_mhz = 1,
+ .early_init = 1,
+ },
+ }"
+
+ device domain 0 on end
+end