diff options
| author | Furquan Shaikh <furquan@google.com> | 2014-06-26 00:11:29 -0700 |
|---|---|---|
| committer | Marc Jones <marc.jones@se-eng.com> | 2015-03-04 18:23:11 +0100 |
| commit | d42b3fc6a9adda4a20cd331b27117d95c70887a4 (patch) | |
| tree | 364dae189730035f2a7d0cae92244392c8b7eba4 /src | |
| parent | b68cb9e8ae63d734f5cea42d54eef11d726a5964 (diff) | |
| download | coreboot-d42b3fc6a9adda4a20cd331b27117d95c70887a4.tar.xz | |
coreboot rush: Add support for basic romstage
Add basic romstage support for rush. Since, dram init needs to be done before we
can jump to armv8 core, romstage will run on armv4 core as well. Thus,
correcting the compiler selection options.
BUG=None
BRANCH=None
TEST=Compiles successfully for rush. Prints romstage banner and initial printk
Original-Change-Id: Ie3cd290e56a712b07c1503dab199e4e34cec04d2
Original-Signed-off-by: Furquan Shaikh <furquan@google.com>
Original-Reviewed-on: https://chromium-review.googlesource.com/205763
Original-Tested-by: Furquan Shaikh <furquan@chromium.org>
Original-Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Original-Reviewed-by: Tom Warren <twarren@nvidia.com>
Original-Commit-Queue: Aaron Durbin <adurbin@chromium.org>
(cherry picked from commit d20b4e66209e902f54a07a17d5ce741f0a0b3a7b)
Signed-off-by: Marc Jones <marc.jones@se-eng.com>
Change-Id: Ic6b7ef4a2ea01c95d0c7f040bbd079219cf5750a
Reviewed-on: http://review.coreboot.org/8573
Tested-by: build bot (Jenkins)
Reviewed-by: Patrick Georgi <pgeorgi@google.com>
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Diffstat (limited to 'src')
| -rw-r--r-- | src/arch/arm/armv4/Makefile.inc | 1 | ||||
| -rw-r--r-- | src/mainboard/google/rush/romstage.c | 8 | ||||
| -rw-r--r-- | src/soc/nvidia/tegra132/Kconfig | 3 |
3 files changed, 11 insertions, 1 deletions
diff --git a/src/arch/arm/armv4/Makefile.inc b/src/arch/arm/armv4/Makefile.inc index 6b516b9cf9..eab7f0f758 100644 --- a/src/arch/arm/armv4/Makefile.inc +++ b/src/arch/arm/armv4/Makefile.inc @@ -49,6 +49,7 @@ ifeq ($(CONFIG_ARCH_ROMSTAGE_ARMV4),y) romstage-c-ccopts += $(armv4_flags) romstage-S-ccopts += $(armv4_flags) +romstage-y += cache.c endif # CONFIG_ARCH_ROMSTAGE_ARMV4 diff --git a/src/mainboard/google/rush/romstage.c b/src/mainboard/google/rush/romstage.c index e2b75f6842..f0de9c0dfb 100644 --- a/src/mainboard/google/rush/romstage.c +++ b/src/mainboard/google/rush/romstage.c @@ -20,11 +20,19 @@ #include <arch/stages.h> #include <cbfs.h> #include <console/console.h> +#include <arch/exception.h> void main(void) { void *entry; + console_init(); + exception_init(); + + printk(BIOS_INFO, "T132: romstage here\n"); + + while (1); + entry = cbfs_load_stage(CBFS_DEFAULT_MEDIA, "fallback/ramstage"); stage_exit(entry); } diff --git a/src/soc/nvidia/tegra132/Kconfig b/src/soc/nvidia/tegra132/Kconfig index 4dc71fe2c5..7e9aed820a 100644 --- a/src/soc/nvidia/tegra132/Kconfig +++ b/src/soc/nvidia/tegra132/Kconfig @@ -3,13 +3,14 @@ config SOC_NVIDIA_TEGRA132 default n select ARCH_BOOTBLOCK_ARMV4 select ARCH_VERSTAGE_ARMV4 - select ARCH_ROMSTAGE_ARMV8_64 + select ARCH_ROMSTAGE_ARMV4 select ARCH_RAMSTAGE_ARMV8_64 select ARM_LPAE select DYNAMIC_CBMEM select BOOTBLOCK_CONSOLE select HAVE_UART_SPECIAL select HAVE_UART_MEMORY_MAPPED + select EARLY_CONSOLE select ARM_BOOTBLOCK_CUSTOM if SOC_NVIDIA_TEGRA132 |