diff options
| author | Richard Spiegel <richard.spiegel@amd.corp-partner.google.com> | 2018-10-01 09:59:21 -0700 |
|---|---|---|
| committer | Martin Roth <martinroth@google.com> | 2018-10-10 16:29:29 +0000 |
| commit | d74df17eb41029033b5abac7866920938d5bc0ef (patch) | |
| tree | ebc1ebafd2c7e27bf5a9321560aeb6b4449de760 /src | |
| parent | 5401aa207cf67a222f8685faedcd97e856fe857e (diff) | |
| download | coreboot-d74df17eb41029033b5abac7866920938d5bc0ef.tar.xz | |
mb/google/kahlee/variants/*/devicetree.cb: Reset I2C slaves
Use the new I2C slave reset function and reset all slaves connected to all
4 I2C. Do this in all boards.
BUG=b:114479395
TEST=Added debug code. Build and boot grunt. Examined output, confirmed
GPIO pins changing as required. Removed debug code.
Change-Id: Ia78ee5d5319d3c1a7daa9c56c81d435999b3a359
Signed-off-by: Richard Spiegel <richard.spiegel@silverbackltd.com>
Reviewed-on: https://review.coreboot.org/28575
Reviewed-by: Martin Roth <martinroth@google.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src')
4 files changed, 12 insertions, 0 deletions
diff --git a/src/mainboard/google/kahlee/variants/aleena/devicetree.cb b/src/mainboard/google/kahlee/variants/aleena/devicetree.cb index 61dee6f77e..5438e6dd41 100644 --- a/src/mainboard/google/kahlee/variants/aleena/devicetree.cb +++ b/src/mainboard/google/kahlee/variants/aleena/devicetree.cb @@ -50,6 +50,9 @@ chip soc/amd/stoneyridge .fall_time_ns = 67, }" + register "i2c_scl_reset" = "GPIO_I2C0_SCL | GPIO_I2C1_SCL | \ + GPIO_I2C2_SCL | GPIO_I2C3_SCL" + device cpu_cluster 0 on device lapic 10 on end end diff --git a/src/mainboard/google/kahlee/variants/careena/devicetree.cb b/src/mainboard/google/kahlee/variants/careena/devicetree.cb index 08d4d4d085..e0909f2fce 100644 --- a/src/mainboard/google/kahlee/variants/careena/devicetree.cb +++ b/src/mainboard/google/kahlee/variants/careena/devicetree.cb @@ -55,6 +55,9 @@ chip soc/amd/stoneyridge .fall_time_ns = 19, }" + register "i2c_scl_reset" = "GPIO_I2C0_SCL | GPIO_I2C1_SCL | \ + GPIO_I2C2_SCL | GPIO_I2C3_SCL" + device cpu_cluster 0 on device lapic 10 on end end diff --git a/src/mainboard/google/kahlee/variants/grunt/devicetree.cb b/src/mainboard/google/kahlee/variants/grunt/devicetree.cb index 128de7d5fc..ab56866f6b 100644 --- a/src/mainboard/google/kahlee/variants/grunt/devicetree.cb +++ b/src/mainboard/google/kahlee/variants/grunt/devicetree.cb @@ -55,6 +55,9 @@ chip soc/amd/stoneyridge .fall_time_ns = 50, }" + register "i2c_scl_reset" = "GPIO_I2C0_SCL | GPIO_I2C1_SCL | \ + GPIO_I2C2_SCL | GPIO_I2C3_SCL" + device cpu_cluster 0 on device lapic 10 on end end diff --git a/src/mainboard/google/kahlee/variants/liara/devicetree.cb b/src/mainboard/google/kahlee/variants/liara/devicetree.cb index 0dfe204bfa..cea3425aff 100644 --- a/src/mainboard/google/kahlee/variants/liara/devicetree.cb +++ b/src/mainboard/google/kahlee/variants/liara/devicetree.cb @@ -50,6 +50,9 @@ chip soc/amd/stoneyridge .fall_time_ns = 8, }" + register "i2c_scl_reset" = "GPIO_I2C0_SCL | GPIO_I2C1_SCL | \ + GPIO_I2C2_SCL | GPIO_I2C3_SCL" + device cpu_cluster 0 on device lapic 10 on end end |