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authorKyösti Mälkki <kyosti.malkki@gmail.com>2019-11-01 07:43:45 +0200
committerKyösti Mälkki <kyosti.malkki@gmail.com>2019-11-02 13:36:11 +0000
commitde09679c13954e81697ecfd469b438b4d27a81b6 (patch)
tree3060569a4d9acef8a03532e4a34bcc0a18066818 /src
parent836994e0836609a3c8e2b4be153bd7622eb3e289 (diff)
downloadcoreboot-de09679c13954e81697ecfd469b438b4d27a81b6.tar.xz
timestamps: COLLECT_TIMESTAMPS is mostly optional
It is a user-visible option and enabled by default for ARCH_X86, some consider it as debugging aid only. Therefore platform design should not depend on it. It must remain selected with CHROMEOS and boards are allowed to explicitly select it as well. For siemens/mc_bdx1,mc_aplX boot time will be increased due the use of get_us_since_boot() with COLLECT_TIMESTAMPS=n. When unable to determine if N seconds has elapsed from boot, this turns into a delay of N seconds. Change-Id: I6ee4195d266440143344781d39db9578cd8bdcb3 Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/36527 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Aaron Durbin <adurbin@chromium.org> Reviewed-by: Marshall Dawson <marshalldawson3rd@gmail.com>
Diffstat (limited to 'src')
-rw-r--r--src/soc/amd/picasso/Kconfig1
-rw-r--r--src/soc/amd/stoneyridge/Kconfig1
-rw-r--r--src/soc/intel/apollolake/Kconfig1
-rw-r--r--src/soc/intel/braswell/Kconfig1
-rw-r--r--src/soc/intel/skylake/Kconfig1
5 files changed, 0 insertions, 5 deletions
diff --git a/src/soc/amd/picasso/Kconfig b/src/soc/amd/picasso/Kconfig
index 6f75e9ed01..d87d634e6a 100644
--- a/src/soc/amd/picasso/Kconfig
+++ b/src/soc/amd/picasso/Kconfig
@@ -38,7 +38,6 @@ config CPU_SPECIFIC_OPTIONS
select SOC_AMD_COMMON_BLOCK_SPI
select TSC_SYNC_LFENCE
select UDELAY_TSC
- select COLLECT_TIMESTAMPS
select SOC_AMD_PI
select SOC_AMD_COMMON
select SOC_AMD_COMMON_BLOCK
diff --git a/src/soc/amd/stoneyridge/Kconfig b/src/soc/amd/stoneyridge/Kconfig
index 0e559371fa..0d6f2ff0bc 100644
--- a/src/soc/amd/stoneyridge/Kconfig
+++ b/src/soc/amd/stoneyridge/Kconfig
@@ -54,7 +54,6 @@ config CPU_SPECIFIC_OPTIONS
select HAVE_USBDEBUG_OPTIONS
select SOC_AMD_COMMON_BLOCK_SPI
select TSC_SYNC_LFENCE
- select COLLECT_TIMESTAMPS
select SOC_AMD_PI
select SOC_AMD_COMMON
select SOC_AMD_COMMON_BLOCK
diff --git a/src/soc/intel/apollolake/Kconfig b/src/soc/intel/apollolake/Kconfig
index a1d3c07093..b54528f579 100644
--- a/src/soc/intel/apollolake/Kconfig
+++ b/src/soc/intel/apollolake/Kconfig
@@ -40,7 +40,6 @@ config CPU_SPECIFIC_OPTIONS
# Misc options
select C_ENVIRONMENT_BOOTBLOCK
select CACHE_MRC_SETTINGS
- select COLLECT_TIMESTAMPS
select COMMON_FADT
select FSP_PLATFORM_MEMORY_SETTINGS_VERSIONS
select GENERIC_GPIO_LIB
diff --git a/src/soc/intel/braswell/Kconfig b/src/soc/intel/braswell/Kconfig
index 5d6438fee5..5053790c75 100644
--- a/src/soc/intel/braswell/Kconfig
+++ b/src/soc/intel/braswell/Kconfig
@@ -14,7 +14,6 @@ config CPU_SPECIFIC_OPTIONS
select ARCH_VERSTAGE_X86_32
select BOOT_DEVICE_SUPPORTS_WRITES
select CACHE_MRC_SETTINGS
- select COLLECT_TIMESTAMPS
select SUPPORT_CPU_UCODE_IN_CBFS
select MICROCODE_BLOB_NOT_IN_BLOB_REPO
select CPU_INTEL_TURBO_NOT_PACKAGE_SCOPED
diff --git a/src/soc/intel/skylake/Kconfig b/src/soc/intel/skylake/Kconfig
index d47572b8e6..f9f6f9302b 100644
--- a/src/soc/intel/skylake/Kconfig
+++ b/src/soc/intel/skylake/Kconfig
@@ -26,7 +26,6 @@ config CPU_SPECIFIC_OPTIONS
select BOOT_DEVICE_SPI_FLASH_RW_NOMMAP_EARLY if BOOT_DEVICE_SPI_FLASH
select BOOT_DEVICE_SUPPORTS_WRITES
select CACHE_MRC_SETTINGS
- select COLLECT_TIMESTAMPS
select COMMON_FADT
select CPU_INTEL_COMMON
select CPU_INTEL_FIRMWARE_INTERFACE_TABLE