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authorWerner Zeh <werner.zeh@siemens.com>2019-09-25 13:48:31 +0200
committerWerner Zeh <werner.zeh@siemens.com>2019-09-30 05:10:55 +0000
commitf553ae4bf39891b0758f5609d707289d26e75d5e (patch)
tree60902d62c3b748786a591dd032b497f0e96c0e05 /src
parent6aeed16422df88c697d034ed4688ab44e41fa070 (diff)
downloadcoreboot-f553ae4bf39891b0758f5609d707289d26e75d5e.tar.xz
fsp_broadwell_de: Enable early write access to the SPI flash
If VBOOT is used on a mainboard based on fsp_broadwell_de then VBOOT needs to be able to write to its NV data which may be stored on the SPI flash. Enable write access to the SPI flash on SoC level. If the mainboard does not use VBOOT the linker will drop the extra code. The benefit is that this code is at least compiled and therefore build tested with fsp_broadwell_de. Change-Id: I90a2d30f5749c75df2b286dce6779f10dde62632 Signed-off-by: Werner Zeh <werner.zeh@siemens.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/35598 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: David Hendricks <david.hendricks@gmail.com> Reviewed-by: Arthur Heymans <arthur@aheymans.xyz>
Diffstat (limited to 'src')
-rw-r--r--src/soc/intel/fsp_broadwell_de/Kconfig2
1 files changed, 2 insertions, 0 deletions
diff --git a/src/soc/intel/fsp_broadwell_de/Kconfig b/src/soc/intel/fsp_broadwell_de/Kconfig
index 9c91d7c5fc..94eff07bab 100644
--- a/src/soc/intel/fsp_broadwell_de/Kconfig
+++ b/src/soc/intel/fsp_broadwell_de/Kconfig
@@ -29,6 +29,8 @@ config CPU_SPECIFIC_OPTIONS
select SOC_INTEL_COMMON
select SOC_INTEL_COMMON_BLOCK
select SOC_INTEL_COMMON_BLOCK_IMC
+ select BOOT_DEVICE_SUPPORTS_WRITES
+ select BOOT_DEVICE_SPI_FLASH_RW_NOMMAP_EARLY
config VBOOT
select VBOOT_STARTS_IN_ROMSTAGE