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authorAlexandru Gagniuc <mr.nuke.me@gmail.com>2014-04-17 11:49:42 -0500
committerAlexandru Gagniuc <mr.nuke.me@gmail.com>2014-04-17 23:20:12 +0200
commitfa4cb6d606a6017758ae1986fe57aea6ed9b0b2b (patch)
treec6d80c0db71ea61fb1a4fab2f0a6b018ff77c5dd /src
parent09fe3f83c545c162a4ac97e8c41198b8be915e2e (diff)
downloadcoreboot-fa4cb6d606a6017758ae1986fe57aea6ed9b0b2b.tar.xz
southbridge/hudson: Remove unused function set_sm_enable_bits()
This function isn't used on hudson, and seems to be copy-paste from older southbridges. It is used in sb700 to enable or disable certain PCI devices. On hudson, these configuration bits are moved to the PM space. Change-Id: I9b967a2d0a5dddc8341204dadeed90460251915c Signed-off-by: Alexandru Gagniuc <mr.nuke.me@gmail.com> Reviewed-on: http://review.coreboot.org/5513 Tested-by: build bot (Jenkins) Reviewed-by: Aaron Durbin <adurbin@gmail.com>
Diffstat (limited to 'src')
-rw-r--r--src/southbridge/amd/agesa/hudson/hudson.c11
-rw-r--r--src/southbridge/amd/agesa/hudson/hudson.h1
2 files changed, 0 insertions, 12 deletions
diff --git a/src/southbridge/amd/agesa/hudson/hudson.c b/src/southbridge/amd/agesa/hudson/hudson.c
index 8289c7fef6..cd63c3e814 100644
--- a/src/southbridge/amd/agesa/hudson/hudson.c
+++ b/src/southbridge/amd/agesa/hudson/hudson.c
@@ -60,17 +60,6 @@ void backup_top_of_ram(uint64_t ramtop)
}
}
-void set_sm_enable_bits(device_t sm_dev, u32 reg_pos, u32 mask, u32 val)
-{
- u32 reg_old, reg;
- reg = reg_old = pci_read_config32(sm_dev, reg_pos);
- reg &= ~mask;
- reg |= val;
- if (reg != reg_old) {
- pci_write_config32(sm_dev, reg_pos, reg);
- }
-}
-
void pm_write8(u8 reg, u8 value)
{
write8(PM_MMIO_BASE + reg, value);
diff --git a/src/southbridge/amd/agesa/hudson/hudson.h b/src/southbridge/amd/agesa/hudson/hudson.h
index 86b42385ee..683fd2802c 100644
--- a/src/southbridge/amd/agesa/hudson/hudson.h
+++ b/src/southbridge/amd/agesa/hudson/hudson.h
@@ -63,7 +63,6 @@ void pm_write8(u8 reg, u8 value);
u8 pm_read8(u8 reg);
void pm_write16(u8 reg, u16 value);
u16 pm_read16(u16 reg);
-void set_sm_enable_bits(device_t sm_dev, u32 reg_pos, u32 mask, u32 val);
#ifdef __PRE_RAM__
void hudson_lpc_port80(void);