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| author | Arthur Heymans <arthur@aheymans.xyz> | 2020-10-28 14:10:37 +0100 |
|---|---|---|
| committer | Patrick Georgi <pgeorgi@google.com> | 2020-11-02 06:16:53 +0000 |
| commit | 087fe9fe2732db04ed62e9d49d5a84efe0656c8a (patch) | |
| tree | 38e2e5c98ce54f23011e6c176018b85646fc8033 /src | |
| parent | 5a6633491158c919a5f9e0e8cf627facb3fe890e (diff) | |
| download | coreboot-087fe9fe2732db04ed62e9d49d5a84efe0656c8a.tar.xz | |
soc/intel/xeon_sp/bootblock.c: Report the FSP-T output
Change-Id: I03841f8263203ee306f83b8f8e859ec03edc3bd3
Signed-off-by: Arthur Heymans <arthur@aheymans.xyz>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/46885
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src')
| -rw-r--r-- | src/soc/intel/xeon_sp/bootblock.c | 3 |
1 files changed, 3 insertions, 0 deletions
diff --git a/src/soc/intel/xeon_sp/bootblock.c b/src/soc/intel/xeon_sp/bootblock.c index f6653e2034..5adda44d93 100644 --- a/src/soc/intel/xeon_sp/bootblock.c +++ b/src/soc/intel/xeon_sp/bootblock.c @@ -10,6 +10,7 @@ #include <intelblocks/lpc_lib.h> #include <soc/pci_devs.h> #include <soc/bootblock.h> +#include <fsp/util.h> const FSPT_UPD temp_ram_init_params = { .FspUpdHeader = { @@ -54,5 +55,7 @@ void bootblock_soc_init(void) { if (CONFIG(BOOTBLOCK_CONSOLE)) printk(BIOS_DEBUG, "FSP TempRamInit successful...\n"); + if (CONFIG(FSP_CAR)) + report_fspt_output(); bootblock_pch_init(); } |