diff options
author | Elyes HAOUAS <ehaouas@noos.fr> | 2018-12-12 15:11:01 +0100 |
---|---|---|
committer | Patrick Georgi <pgeorgi@google.com> | 2018-12-19 05:23:03 +0000 |
commit | 19ea62e19dabdaef4032ab40e7ff9b2ac79d9b81 (patch) | |
tree | 0b648ef8b0eb30211a2859af3b5b1c26f5b4de9c /src | |
parent | 17115156b04d75325ffb0f4818fcd31cecc8eb9b (diff) | |
download | coreboot-19ea62e19dabdaef4032ab40e7ff9b2ac79d9b81.tar.xz |
southbridge: Remove useless include <device/pci_ids.h>
Change-Id: Ia640131479d4221ccd84613033f28de3932b8bff
Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr>
Reviewed-on: https://review.coreboot.org/c/30120
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Werner Zeh <werner.zeh@siemens.com>
Diffstat (limited to 'src')
38 files changed, 2 insertions, 38 deletions
diff --git a/src/southbridge/amd/agesa/hudson/bootblock.c b/src/southbridge/amd/agesa/hudson/bootblock.c index 32b129862d..bb6a54ba42 100644 --- a/src/southbridge/amd/agesa/hudson/bootblock.c +++ b/src/southbridge/amd/agesa/hudson/bootblock.c @@ -15,7 +15,6 @@ #include <stdint.h> #include <arch/io.h> -#include <device/pci_ids.h> /* * Enable 4MB (LPC) ROM access at 0xFFC00000 - 0xFFFFFFFF. diff --git a/src/southbridge/amd/agesa/hudson/hudson.h b/src/southbridge/amd/agesa/hudson/hudson.h index 165d33f777..bd49e8f05c 100644 --- a/src/southbridge/amd/agesa/hudson/hudson.h +++ b/src/southbridge/amd/agesa/hudson/hudson.h @@ -17,7 +17,6 @@ #ifndef HUDSON_H #define HUDSON_H -#include <device/pci_ids.h> #include <device/device.h> #include "chip.h" diff --git a/src/southbridge/amd/amd8111/early_ctrl.c b/src/southbridge/amd/amd8111/early_ctrl.c index ce29bf1e77..1754d23d03 100644 --- a/src/southbridge/amd/amd8111/early_ctrl.c +++ b/src/southbridge/amd/amd8111/early_ctrl.c @@ -13,9 +13,10 @@ * GNU General Public License for more details. */ -#include "amd8111.h" +#include <device/pci_ids.h> #include <reset.h> #include <southbridge/amd/common/reset.h> +#include "amd8111.h" unsigned get_sbdn(unsigned bus) { diff --git a/src/southbridge/amd/pi/hudson/hudson.h b/src/southbridge/amd/pi/hudson/hudson.h index 922c608a67..27ae4edf47 100644 --- a/src/southbridge/amd/pi/hudson/hudson.h +++ b/src/southbridge/amd/pi/hudson/hudson.h @@ -18,7 +18,6 @@ #define HUDSON_H #include <types.h> -#include <device/pci_ids.h> #include <device/device.h> #include "chip.h" diff --git a/src/southbridge/amd/rs780/cmn.c b/src/southbridge/amd/rs780/cmn.c index 23cd877370..16270d6d89 100644 --- a/src/southbridge/amd/rs780/cmn.c +++ b/src/southbridge/amd/rs780/cmn.c @@ -18,7 +18,6 @@ #include <arch/cpu.h> #include <device/device.h> #include <device/pci.h> -#include <device/pci_ids.h> #include <device/pci_ops.h> #include <cpu/x86/msr.h> #include <cpu/amd/mtrr.h> diff --git a/src/southbridge/amd/rs780/pcie.c b/src/southbridge/amd/rs780/pcie.c index adf5401bb7..437a62aa87 100644 --- a/src/southbridge/amd/rs780/pcie.c +++ b/src/southbridge/amd/rs780/pcie.c @@ -16,7 +16,6 @@ #include <console/console.h> #include <device/device.h> #include <device/pci.h> -#include <device/pci_ids.h> #include <device/pci_ops.h> #include <delay.h> #include "rs780.h" diff --git a/src/southbridge/amd/rs780/rs780.c b/src/southbridge/amd/rs780/rs780.c index 3c9393d3e3..36b37ccbe6 100644 --- a/src/southbridge/amd/rs780/rs780.c +++ b/src/southbridge/amd/rs780/rs780.c @@ -18,7 +18,6 @@ #include <arch/acpi.h> #include <device/device.h> #include <device/pci.h> -#include <device/pci_ids.h> #include <device/pci_ops.h> #include <cpu/x86/msr.h> #include <cpu/amd/mtrr.h> diff --git a/src/southbridge/amd/rs780/rs780.h b/src/southbridge/amd/rs780/rs780.h index e96608eba9..354555fb5c 100644 --- a/src/southbridge/amd/rs780/rs780.h +++ b/src/southbridge/amd/rs780/rs780.h @@ -18,7 +18,6 @@ #include <rules.h> #include <stdint.h> -#include <device/pci_ids.h> #include "chip.h" #include "rev.h" diff --git a/src/southbridge/amd/sb700/bootblock.c b/src/southbridge/amd/sb700/bootblock.c index e77db5ced9..364fa01c51 100644 --- a/src/southbridge/amd/sb700/bootblock.c +++ b/src/southbridge/amd/sb700/bootblock.c @@ -16,7 +16,6 @@ #include <stdint.h> #include <arch/io.h> -#include <device/pci_ids.h> #define IO_MEM_PORT_DECODE_ENABLE_5 0x48 #define IO_MEM_PORT_DECODE_ENABLE_6 0x4a diff --git a/src/southbridge/amd/sb700/sb700.h b/src/southbridge/amd/sb700/sb700.h index 73c0b3740b..0b638f65c4 100644 --- a/src/southbridge/amd/sb700/sb700.h +++ b/src/southbridge/amd/sb700/sb700.h @@ -17,7 +17,6 @@ #ifndef SB700_H #define SB700_H -#include <device/pci_ids.h> #include "chip.h" /* Power management index/data registers */ diff --git a/src/southbridge/amd/sb800/bootblock.c b/src/southbridge/amd/sb800/bootblock.c index e95d4e9ddf..b08d4775c4 100644 --- a/src/southbridge/amd/sb800/bootblock.c +++ b/src/southbridge/amd/sb800/bootblock.c @@ -15,7 +15,6 @@ #include <stdint.h> #include <arch/io.h> -#include <device/pci_ids.h> /* * Enable 4MB (LPC) ROM access at 0xFFC00000 - 0xFFFFFFFF. diff --git a/src/southbridge/amd/sb800/sb800.h b/src/southbridge/amd/sb800/sb800.h index a65c68a94d..3715a3ac1c 100644 --- a/src/southbridge/amd/sb800/sb800.h +++ b/src/southbridge/amd/sb800/sb800.h @@ -17,7 +17,6 @@ #ifndef SB800_H #define SB800_H -#include <device/pci_ids.h> #include "chip.h" /* Power management index/data registers */ diff --git a/src/southbridge/amd/sr5650/pcie.c b/src/southbridge/amd/sr5650/pcie.c index 159f3e43eb..f2fd5392fc 100644 --- a/src/southbridge/amd/sr5650/pcie.c +++ b/src/southbridge/amd/sr5650/pcie.c @@ -17,7 +17,6 @@ #include <console/console.h> #include <device/device.h> #include <device/pci.h> -#include <device/pci_ids.h> #include <device/pci_ops.h> #include <delay.h> #include "sr5650.h" diff --git a/src/southbridge/amd/sr5650/sr5650.h b/src/southbridge/amd/sr5650/sr5650.h index 2e6b728495..06a427987d 100644 --- a/src/southbridge/amd/sr5650/sr5650.h +++ b/src/southbridge/amd/sr5650/sr5650.h @@ -19,7 +19,6 @@ #include <stdint.h> #include <arch/acpi.h> -#include <device/pci_ids.h> #include "chip.h" #include "rev.h" diff --git a/src/southbridge/intel/bd82x6x/early_me.c b/src/southbridge/intel/bd82x6x/early_me.c index bda139b1fe..ee149d09b5 100644 --- a/src/southbridge/intel/bd82x6x/early_me.c +++ b/src/southbridge/intel/bd82x6x/early_me.c @@ -17,7 +17,6 @@ #include <arch/io.h> #include <console/console.h> #include <delay.h> -#include <device/pci_ids.h> #include <device/pci_def.h> #include <halt.h> #include <string.h> diff --git a/src/southbridge/intel/bd82x6x/early_me_mrc.c b/src/southbridge/intel/bd82x6x/early_me_mrc.c index a6562c77a7..ed27573235 100644 --- a/src/southbridge/intel/bd82x6x/early_me_mrc.c +++ b/src/southbridge/intel/bd82x6x/early_me_mrc.c @@ -17,7 +17,6 @@ #include <arch/io.h> #include <console/console.h> #include <delay.h> -#include <device/pci_ids.h> #include <device/pci_def.h> #include <halt.h> #include <string.h> diff --git a/src/southbridge/intel/bd82x6x/early_smbus.c b/src/southbridge/intel/bd82x6x/early_smbus.c index 4c67aea29c..3cd98ac5e4 100644 --- a/src/southbridge/intel/bd82x6x/early_smbus.c +++ b/src/southbridge/intel/bd82x6x/early_smbus.c @@ -16,7 +16,6 @@ #include <arch/io.h> #include <console/console.h> -#include <device/pci_ids.h> #include <device/pci_def.h> #include <southbridge/intel/common/smbus.h> #include "pch.h" diff --git a/src/southbridge/intel/bd82x6x/early_spi.c b/src/southbridge/intel/bd82x6x/early_spi.c index 140083734d..e3f07ad203 100644 --- a/src/southbridge/intel/bd82x6x/early_spi.c +++ b/src/southbridge/intel/bd82x6x/early_spi.c @@ -16,7 +16,6 @@ #include <arch/io.h> #include <console/console.h> -#include <device/pci_ids.h> #include <device/pci_def.h> #include <delay.h> #include "pch.h" diff --git a/src/southbridge/intel/bd82x6x/early_usb.c b/src/southbridge/intel/bd82x6x/early_usb.c index 1044953d7c..c34b3ec816 100644 --- a/src/southbridge/intel/bd82x6x/early_usb.c +++ b/src/southbridge/intel/bd82x6x/early_usb.c @@ -15,7 +15,6 @@ */ #include <arch/io.h> -#include <device/pci_ids.h> #include <device/pci_def.h> #include <northbridge/intel/sandybridge/sandybridge.h> #include "pch.h" diff --git a/src/southbridge/intel/bd82x6x/early_usb_mrc.c b/src/southbridge/intel/bd82x6x/early_usb_mrc.c index 8006d95fd9..e4fadad6cb 100644 --- a/src/southbridge/intel/bd82x6x/early_usb_mrc.c +++ b/src/southbridge/intel/bd82x6x/early_usb_mrc.c @@ -15,7 +15,6 @@ */ #include <arch/io.h> -#include <device/pci_ids.h> #include <device/pci_def.h> #include "pch.h" diff --git a/src/southbridge/intel/common/spi.c b/src/southbridge/intel/common/spi.c index fe3bf2a6a0..3ca0d6c8d6 100644 --- a/src/southbridge/intel/common/spi.c +++ b/src/southbridge/intel/common/spi.c @@ -25,7 +25,6 @@ #include <delay.h> #include <arch/io.h> #include <console/console.h> -#include <device/pci_ids.h> #include <device/pci.h> #include <spi_flash.h> diff --git a/src/southbridge/intel/fsp_rangeley/early_smbus.c b/src/southbridge/intel/fsp_rangeley/early_smbus.c index 84b750e228..9b47837dd1 100644 --- a/src/southbridge/intel/fsp_rangeley/early_smbus.c +++ b/src/southbridge/intel/fsp_rangeley/early_smbus.c @@ -16,7 +16,6 @@ #include <arch/io.h> #include <console/console.h> -#include <device/pci_ids.h> #include <device/pci_def.h> #include <southbridge/intel/common/smbus.h> #include "soc.h" diff --git a/src/southbridge/intel/fsp_rangeley/early_spi.c b/src/southbridge/intel/fsp_rangeley/early_spi.c index dbf6003005..3c4f2d7ee5 100644 --- a/src/southbridge/intel/fsp_rangeley/early_spi.c +++ b/src/southbridge/intel/fsp_rangeley/early_spi.c @@ -16,7 +16,6 @@ #include <arch/io.h> #include <console/console.h> -#include <device/pci_ids.h> #include <device/pci_def.h> #include <delay.h> #include "soc.h" diff --git a/src/southbridge/intel/fsp_rangeley/early_usb.c b/src/southbridge/intel/fsp_rangeley/early_usb.c index 3bb8dab405..0bcd09d65d 100644 --- a/src/southbridge/intel/fsp_rangeley/early_usb.c +++ b/src/southbridge/intel/fsp_rangeley/early_usb.c @@ -15,7 +15,6 @@ */ #include <arch/io.h> -#include <device/pci_ids.h> #include <device/pci_def.h> #include "soc.h" diff --git a/src/southbridge/intel/i82371eb/acpi_tables.c b/src/southbridge/intel/i82371eb/acpi_tables.c index 9a720e2cf4..7c6d3b4a2e 100644 --- a/src/southbridge/intel/i82371eb/acpi_tables.c +++ b/src/southbridge/intel/i82371eb/acpi_tables.c @@ -21,7 +21,6 @@ #include <arch/acpigen.h> #include <arch/smp/mpspec.h> #include <device/device.h> -#include <device/pci_ids.h> #include "i82371eb.h" static int determine_total_number_of_cores(void) diff --git a/src/southbridge/intel/i82801dx/i82801dx.c b/src/southbridge/intel/i82801dx/i82801dx.c index fc38207c49..8db591c177 100644 --- a/src/southbridge/intel/i82801dx/i82801dx.c +++ b/src/southbridge/intel/i82801dx/i82801dx.c @@ -16,7 +16,6 @@ #include <device/device.h> #include <device/pci.h> -#include <device/pci_ids.h> #include "i82801dx.h" void i82801dx_enable(struct device *dev) diff --git a/src/southbridge/intel/i82801gx/early_smbus.c b/src/southbridge/intel/i82801gx/early_smbus.c index bb5caf5ca0..698458b86a 100644 --- a/src/southbridge/intel/i82801gx/early_smbus.c +++ b/src/southbridge/intel/i82801gx/early_smbus.c @@ -16,7 +16,6 @@ #include <arch/io.h> #include <console/console.h> -#include <device/pci_ids.h> #include <device/pci_def.h> #include <southbridge/intel/common/smbus.h> #include "i82801gx.h" diff --git a/src/southbridge/intel/i82801ix/early_smbus.c b/src/southbridge/intel/i82801ix/early_smbus.c index 0e4195c198..0dda0c84b9 100644 --- a/src/southbridge/intel/i82801ix/early_smbus.c +++ b/src/southbridge/intel/i82801ix/early_smbus.c @@ -17,7 +17,6 @@ #include <arch/io.h> #include <console/console.h> -#include <device/pci_ids.h> #include <device/pci_def.h> #include <southbridge/intel/common/smbus.h> #include "i82801ix.h" diff --git a/src/southbridge/intel/i82801jx/early_smbus.c b/src/southbridge/intel/i82801jx/early_smbus.c index 16932e0e51..bd689556e9 100644 --- a/src/southbridge/intel/i82801jx/early_smbus.c +++ b/src/southbridge/intel/i82801jx/early_smbus.c @@ -17,7 +17,6 @@ #include <arch/io.h> #include <console/console.h> -#include <device/pci_ids.h> #include <device/pci_def.h> #include <southbridge/intel/common/smbus.h> #include "i82801jx.h" diff --git a/src/southbridge/intel/ibexpeak/early_smbus.c b/src/southbridge/intel/ibexpeak/early_smbus.c index b7823ebf59..8760a82435 100644 --- a/src/southbridge/intel/ibexpeak/early_smbus.c +++ b/src/southbridge/intel/ibexpeak/early_smbus.c @@ -16,7 +16,6 @@ #include <arch/io.h> #include <console/console.h> -#include <device/pci_ids.h> #include <device/pci_def.h> #include <southbridge/intel/common/smbus.h> #include "pch.h" diff --git a/src/southbridge/intel/ibexpeak/madt.c b/src/southbridge/intel/ibexpeak/madt.c index e02cd883dc..585df93715 100644 --- a/src/southbridge/intel/ibexpeak/madt.c +++ b/src/southbridge/intel/ibexpeak/madt.c @@ -23,7 +23,6 @@ #include <arch/smp/mpspec.h> #include <device/device.h> #include <device/pci.h> -#include <device/pci_ids.h> unsigned long acpi_fill_madt(unsigned long current) { diff --git a/src/southbridge/intel/lynxpoint/early_me.c b/src/southbridge/intel/lynxpoint/early_me.c index 674534fc03..e02a16c41a 100644 --- a/src/southbridge/intel/lynxpoint/early_me.c +++ b/src/southbridge/intel/lynxpoint/early_me.c @@ -17,7 +17,6 @@ #include <arch/io.h> #include <console/console.h> #include <delay.h> -#include <device/pci_ids.h> #include <halt.h> #include <string.h> #include "me.h" diff --git a/src/southbridge/intel/lynxpoint/early_smbus.c b/src/southbridge/intel/lynxpoint/early_smbus.c index 4c67aea29c..3cd98ac5e4 100644 --- a/src/southbridge/intel/lynxpoint/early_smbus.c +++ b/src/southbridge/intel/lynxpoint/early_smbus.c @@ -16,7 +16,6 @@ #include <arch/io.h> #include <console/console.h> -#include <device/pci_ids.h> #include <device/pci_def.h> #include <southbridge/intel/common/smbus.h> #include "pch.h" diff --git a/src/southbridge/intel/lynxpoint/early_spi.c b/src/southbridge/intel/lynxpoint/early_spi.c index 140083734d..e3f07ad203 100644 --- a/src/southbridge/intel/lynxpoint/early_spi.c +++ b/src/southbridge/intel/lynxpoint/early_spi.c @@ -16,7 +16,6 @@ #include <arch/io.h> #include <console/console.h> -#include <device/pci_ids.h> #include <device/pci_def.h> #include <delay.h> #include "pch.h" diff --git a/src/southbridge/intel/lynxpoint/early_usb.c b/src/southbridge/intel/lynxpoint/early_usb.c index 60ab09dc36..4b447161ef 100644 --- a/src/southbridge/intel/lynxpoint/early_usb.c +++ b/src/southbridge/intel/lynxpoint/early_usb.c @@ -15,7 +15,6 @@ */ #include <arch/io.h> -#include <device/pci_ids.h> #include <device/pci_def.h> #include "pch.h" diff --git a/src/southbridge/ti/pci7420/cardbus.c b/src/southbridge/ti/pci7420/cardbus.c index 910b0c88ed..3c885297ed 100644 --- a/src/southbridge/ti/pci7420/cardbus.c +++ b/src/southbridge/ti/pci7420/cardbus.c @@ -18,7 +18,6 @@ #include <device/device.h> #include <device/pci.h> #include <device/pci_ops.h> -#include <device/pci_ids.h> #include <console/console.h> #include <device/cardbus.h> #include "pci7420.h" diff --git a/src/southbridge/ti/pci7420/firewire.c b/src/southbridge/ti/pci7420/firewire.c index e42b6a65f8..1379d59e75 100644 --- a/src/southbridge/ti/pci7420/firewire.c +++ b/src/southbridge/ti/pci7420/firewire.c @@ -18,7 +18,6 @@ #include <device/device.h> #include <device/pci.h> #include <device/pci_ops.h> -#include <device/pci_ids.h> #include <console/console.h> #include <device/cardbus.h> #include "pci7420.h" diff --git a/src/southbridge/ti/pcixx12/pcixx12.c b/src/southbridge/ti/pcixx12/pcixx12.c index ab7231e640..6385ba9caa 100644 --- a/src/southbridge/ti/pcixx12/pcixx12.c +++ b/src/southbridge/ti/pcixx12/pcixx12.c @@ -17,7 +17,6 @@ #include <device/device.h> #include <device/pci.h> #include <device/pci_ops.h> -#include <device/pci_ids.h> #include <console/console.h> #include <device/cardbus.h> |