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| author | Angel Pons <th3fanbus@gmail.com> | 2020-10-13 23:43:00 +0200 |
|---|---|---|
| committer | Angel Pons <th3fanbus@gmail.com> | 2020-10-23 18:09:51 +0000 |
| commit | 1ca6b531eef43c675b73ee47a59afd2e28d57d7e (patch) | |
| tree | 971ce46cb658947651f5fbd52d1e8092f56ddbe6 /src | |
| parent | 0117e4eae3ea8d72c24a013ecd5cf3ff510a258c (diff) | |
| download | coreboot-1ca6b531eef43c675b73ee47a59afd2e28d57d7e.tar.xz | |
nb/intel/haswell: Drop ASM to call into MRC
Commit c2ee680 (sandybridge: Use calls rather than asm to call to MRC.)
did it for Sandy Bridge, and this commit does it for Haswell.
Tested on Asrock B85M Pro4, still boots with MRC.
Change-Id: Ic915ae2a30f99805b2c87df8f9a9586a74a40c29
Signed-off-by: Angel Pons <th3fanbus@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/46370
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Nico Huber <nico.h@gmx.de>
Diffstat (limited to 'src')
| -rw-r--r-- | src/northbridge/intel/haswell/raminit.c | 9 |
1 files changed, 4 insertions, 5 deletions
diff --git a/src/northbridge/intel/haswell/raminit.c b/src/northbridge/intel/haswell/raminit.c index fbe4cd5d2c..b23f07252e 100644 --- a/src/northbridge/intel/haswell/raminit.c +++ b/src/northbridge/intel/haswell/raminit.c @@ -108,7 +108,8 @@ static void report_memory_config(void) */ void sdram_initialize(struct pei_data *pei_data) { - unsigned long entry; + int (*entry)(struct pei_data *pei_data) __attribute__((regparm(1))); + uint32_t type = CBFS_TYPE_MRC; struct cbfsf f; @@ -137,11 +138,9 @@ void sdram_initialize(struct pei_data *pei_data) die("mrc.bin not found!"); /* We don't care about leaking the mapping */ - entry = (unsigned long)rdev_mmap_full(&f.data); + entry = rdev_mmap_full(&f.data); if (entry) { - int rv; - asm volatile ("call *%%ecx\n\t" - :"=a" (rv) : "c" (entry), "a" (pei_data)); + int rv = entry(pei_data); /* The mrc.bin reconfigures USB, so usbdebug needs to be reinitialized */ if (CONFIG(USBDEBUG_IN_PRE_RAM)) |