diff options
| author | Elyes HAOUAS <ehaouas@noos.fr> | 2018-05-28 13:41:43 +0200 |
|---|---|---|
| committer | Patrick Georgi <pgeorgi@google.com> | 2018-06-04 09:09:08 +0000 |
| commit | 1d446349ae82ffb0df0684fb9cf9e64f553206b7 (patch) | |
| tree | 097a346eeaf9cf4582356219da724812cb14db20 /src | |
| parent | 39b4707feceee28a4f9e04a6ff95b554cf26f2f2 (diff) | |
| download | coreboot-1d446349ae82ffb0df0684fb9cf9e64f553206b7.tar.xz | |
mb/msi: Get rid of whitespace before tab
Change-Id: I9d35bc706b0daac1e234441c86286cb2957f89ee
Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr>
Reviewed-on: https://review.coreboot.org/26632
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Patrick Georgi <pgeorgi@google.com>
Diffstat (limited to 'src')
| -rw-r--r-- | src/mainboard/msi/ms7721/acpi/gpe.asl | 2 | ||||
| -rw-r--r-- | src/mainboard/msi/ms7721/acpi/sleep.asl | 2 | ||||
| -rw-r--r-- | src/mainboard/msi/ms7721/buildOpts.c | 10 |
3 files changed, 7 insertions, 7 deletions
diff --git a/src/mainboard/msi/ms7721/acpi/gpe.asl b/src/mainboard/msi/ms7721/acpi/gpe.asl index c34faaf05e..297db37a67 100644 --- a/src/mainboard/msi/ms7721/acpi/gpe.asl +++ b/src/mainboard/msi/ms7721/acpi/gpe.asl @@ -69,4 +69,4 @@ Scope(\_GPE) { /* Start Scope GPE */ Notify(\_SB.PCI0.AZHD, 0x02) /* NOTIFY_DEVICE_WAKE */ Notify(\_SB.PWRB, 0x02) /* NOTIFY_DEVICE_WAKE */ } -} /* End Scope GPE */ +} /* End Scope GPE */ diff --git a/src/mainboard/msi/ms7721/acpi/sleep.asl b/src/mainboard/msi/ms7721/acpi/sleep.asl index 3250f5ef4e..08b7de47f3 100644 --- a/src/mainboard/msi/ms7721/acpi/sleep.asl +++ b/src/mainboard/msi/ms7721/acpi/sleep.asl @@ -44,7 +44,7 @@ Method(\_PTS, 1) { /* On older chips, clear PciExpWakeDisEn */ /*if (LLessEqual(\_SB.SBRI, 0x13)) { - * Store(0,\_SB.PWDE) + * Store(0,\_SB.PWDE) *} */ diff --git a/src/mainboard/msi/ms7721/buildOpts.c b/src/mainboard/msi/ms7721/buildOpts.c index 9bce45a4b8..adcb41797e 100644 --- a/src/mainboard/msi/ms7721/buildOpts.c +++ b/src/mainboard/msi/ms7721/buildOpts.c @@ -168,11 +168,11 @@ #define BLDCFG_LVDS_POWER_ON_SEQ_BLON_TO_VARY_BL 3 #if IS_ENABLED(CONFIG_GFXUMA) -#define BLDCFG_UMA_ALIGNMENT UMA_4MB_ALIGNED -#define BLDCFG_UMA_ALLOCATION_MODE UMA_SPECIFIED -//#define BLDCFG_UMA_ALLOCATION_SIZE 0x1000//0x1800//0x1000 /* (1000 << 16) = 256M*/ -#define BLDCFG_UMA_ALLOCATION_SIZE 0x2000//512M -#define BLDCFG_UMA_ABOVE4G_SUPPORT FALSE +#define BLDCFG_UMA_ALIGNMENT UMA_4MB_ALIGNED +#define BLDCFG_UMA_ALLOCATION_MODE UMA_SPECIFIED +//#define BLDCFG_UMA_ALLOCATION_SIZE 0x1000//0x1800//0x1000 /* (1000 << 16) = 256M*/ +#define BLDCFG_UMA_ALLOCATION_SIZE 0x2000//512M +#define BLDCFG_UMA_ABOVE4G_SUPPORT FALSE #endif #define BLDCFG_IOMMU_SUPPORT TRUE |