diff options
author | Angel Pons <th3fanbus@gmail.com> | 2019-12-19 22:41:06 +0100 |
---|---|---|
committer | Patrick Georgi <pgeorgi@google.com> | 2019-12-31 15:16:57 +0000 |
commit | 408d1dac9e23250c0e485bbf934771f769b717c1 (patch) | |
tree | 984d2a88f61cb8e09cf3a42803dc40fa7c3edb61 /src | |
parent | ae863e2e25dba8ca80871551599fa79f7fac8e07 (diff) | |
download | coreboot-408d1dac9e23250c0e485bbf934771f769b717c1.tar.xz |
mb/**/dsdt.asl: Remove outdated sleepstates.asl comment
Previously, each Intel chipset had its own sleepstates.asl file.
However, this is no longer the case, so drop these comments.
Change-Id: I50aba6e74f41e2fa498375b5eb6b7e993d06bcac
Signed-off-by: Angel Pons <th3fanbus@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/37855
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Frans Hendriks <fhendriks@eltan.com>
Reviewed-by: Wim Vervoorn <wvervoorn@eltan.com>
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Reviewed-by: Werner Zeh <werner.zeh@siemens.com>
Diffstat (limited to 'src')
86 files changed, 3 insertions, 86 deletions
diff --git a/src/mainboard/apple/macbook21/dsdt.asl b/src/mainboard/apple/macbook21/dsdt.asl index 7968c6e199..97a4b05077 100644 --- a/src/mainboard/apple/macbook21/dsdt.asl +++ b/src/mainboard/apple/macbook21/dsdt.asl @@ -44,6 +44,5 @@ DefinitionBlock( } } - /* Chipset specific sleep states */ #include <southbridge/intel/common/acpi/sleepstates.asl> } diff --git a/src/mainboard/asrock/g41c-gs/dsdt.asl b/src/mainboard/asrock/g41c-gs/dsdt.asl index 31e7c10d3e..cddaa3af4e 100644 --- a/src/mainboard/asrock/g41c-gs/dsdt.asl +++ b/src/mainboard/asrock/g41c-gs/dsdt.asl @@ -37,6 +37,5 @@ DefinitionBlock( } } - /* Chipset specific sleep states */ #include <southbridge/intel/common/acpi/sleepstates.asl> } diff --git a/src/mainboard/asrock/h110m/dsdt.asl b/src/mainboard/asrock/h110m/dsdt.asl index 0b3baf6153..1f3537e12b 100644 --- a/src/mainboard/asrock/h110m/dsdt.asl +++ b/src/mainboard/asrock/h110m/dsdt.asl @@ -47,7 +47,6 @@ DefinitionBlock( #include "acpi/dptf.asl" } - // Chipset specific sleep states #include <southbridge/intel/common/acpi/sleepstates.asl> // Mainboard specific diff --git a/src/mainboard/asus/p5gc-mx/dsdt.asl b/src/mainboard/asus/p5gc-mx/dsdt.asl index 1c360f9aea..0e4bc65093 100644 --- a/src/mainboard/asus/p5gc-mx/dsdt.asl +++ b/src/mainboard/asus/p5gc-mx/dsdt.asl @@ -48,6 +48,5 @@ DefinitionBlock( } } - /* Chipset specific sleep states */ #include <southbridge/intel/common/acpi/sleepstates.asl> } diff --git a/src/mainboard/asus/p5qc/dsdt.asl b/src/mainboard/asus/p5qc/dsdt.asl index b9b5adcc24..75e3b98d6d 100644 --- a/src/mainboard/asus/p5qc/dsdt.asl +++ b/src/mainboard/asus/p5qc/dsdt.asl @@ -37,6 +37,5 @@ DefinitionBlock( } } - /* Chipset specific sleep states */ #include <southbridge/intel/common/acpi/sleepstates.asl> } diff --git a/src/mainboard/asus/p5ql-em/dsdt.asl b/src/mainboard/asus/p5ql-em/dsdt.asl index 632c6cba2a..07f19eca23 100644 --- a/src/mainboard/asus/p5ql-em/dsdt.asl +++ b/src/mainboard/asus/p5ql-em/dsdt.asl @@ -36,6 +36,5 @@ DefinitionBlock( } } - /* Chipset specific sleep states */ #include <southbridge/intel/common/acpi/sleepstates.asl> } diff --git a/src/mainboard/asus/p5qpl-am/dsdt.asl b/src/mainboard/asus/p5qpl-am/dsdt.asl index 31e7c10d3e..cddaa3af4e 100644 --- a/src/mainboard/asus/p5qpl-am/dsdt.asl +++ b/src/mainboard/asus/p5qpl-am/dsdt.asl @@ -37,6 +37,5 @@ DefinitionBlock( } } - /* Chipset specific sleep states */ #include <southbridge/intel/common/acpi/sleepstates.asl> } diff --git a/src/mainboard/facebook/fbg1701/dsdt.asl b/src/mainboard/facebook/fbg1701/dsdt.asl index 9b4dc817bf..6fcb39af2f 100644 --- a/src/mainboard/facebook/fbg1701/dsdt.asl +++ b/src/mainboard/facebook/fbg1701/dsdt.asl @@ -43,7 +43,7 @@ DefinitionBlock( } } - /* Chipset specific sleep states */ + /* Mainboard specific sleep states */ #include "acpi/sleepstates.asl" #include "acpi/mainboard.asl" } diff --git a/src/mainboard/facebook/monolith/dsdt.asl b/src/mainboard/facebook/monolith/dsdt.asl index 8fea1d511a..004cc62a0f 100644 --- a/src/mainboard/facebook/monolith/dsdt.asl +++ b/src/mainboard/facebook/monolith/dsdt.asl @@ -45,7 +45,6 @@ DefinitionBlock( #include "acpi/dptf.asl" } - // Chipset specific sleep states #include <southbridge/intel/common/acpi/sleepstates.asl> // Mainboard specific diff --git a/src/mainboard/foxconn/d41s/dsdt.asl b/src/mainboard/foxconn/d41s/dsdt.asl index e07ecc2801..a0e9b626f7 100644 --- a/src/mainboard/foxconn/d41s/dsdt.asl +++ b/src/mainboard/foxconn/d41s/dsdt.asl @@ -37,6 +37,5 @@ DefinitionBlock( } } - /* Chipset specific sleep states */ #include <southbridge/intel/common/acpi/sleepstates.asl> } diff --git a/src/mainboard/foxconn/g41s-k/dsdt.asl b/src/mainboard/foxconn/g41s-k/dsdt.asl index 31e7c10d3e..cddaa3af4e 100644 --- a/src/mainboard/foxconn/g41s-k/dsdt.asl +++ b/src/mainboard/foxconn/g41s-k/dsdt.asl @@ -37,6 +37,5 @@ DefinitionBlock( } } - /* Chipset specific sleep states */ #include <southbridge/intel/common/acpi/sleepstates.asl> } diff --git a/src/mainboard/getac/p470/dsdt.asl b/src/mainboard/getac/p470/dsdt.asl index 9be21ad38a..ce36c28872 100644 --- a/src/mainboard/getac/p470/dsdt.asl +++ b/src/mainboard/getac/p470/dsdt.asl @@ -53,6 +53,5 @@ DefinitionBlock( } } - /* Chipset specific sleep states */ #include <southbridge/intel/common/acpi/sleepstates.asl> } diff --git a/src/mainboard/gigabyte/ga-945gcm-s2l/dsdt.asl b/src/mainboard/gigabyte/ga-945gcm-s2l/dsdt.asl index 7d0ffe046d..be640c505e 100644 --- a/src/mainboard/gigabyte/ga-945gcm-s2l/dsdt.asl +++ b/src/mainboard/gigabyte/ga-945gcm-s2l/dsdt.asl @@ -48,6 +48,5 @@ DefinitionBlock( } } - /* Chipset specific sleep states */ #include <southbridge/intel/common/acpi/sleepstates.asl> } diff --git a/src/mainboard/gigabyte/ga-g41m-es2l/dsdt.asl b/src/mainboard/gigabyte/ga-g41m-es2l/dsdt.asl index 31e7c10d3e..cddaa3af4e 100644 --- a/src/mainboard/gigabyte/ga-g41m-es2l/dsdt.asl +++ b/src/mainboard/gigabyte/ga-g41m-es2l/dsdt.asl @@ -37,6 +37,5 @@ DefinitionBlock( } } - /* Chipset specific sleep states */ #include <southbridge/intel/common/acpi/sleepstates.asl> } diff --git a/src/mainboard/google/auron/dsdt.asl b/src/mainboard/google/auron/dsdt.asl index b463214547..1936a3e041 100644 --- a/src/mainboard/google/auron/dsdt.asl +++ b/src/mainboard/google/auron/dsdt.asl @@ -49,7 +49,6 @@ DefinitionBlock( // Chrome OS specific #include <vendorcode/google/chromeos/acpi/chromeos.asl> - // Chipset specific sleep states #include <southbridge/intel/common/acpi/sleepstates.asl> // Mainboard specific diff --git a/src/mainboard/google/beltino/dsdt.asl b/src/mainboard/google/beltino/dsdt.asl index 447ea02150..79981254b8 100644 --- a/src/mainboard/google/beltino/dsdt.asl +++ b/src/mainboard/google/beltino/dsdt.asl @@ -51,6 +51,5 @@ DefinitionBlock( // Chrome OS specific #include <vendorcode/google/chromeos/acpi/chromeos.asl> - // Chipset specific sleep states #include <southbridge/intel/common/acpi/sleepstates.asl> } diff --git a/src/mainboard/google/butterfly/dsdt.asl b/src/mainboard/google/butterfly/dsdt.asl index ad9b77b5f7..b7a8cdfd41 100644 --- a/src/mainboard/google/butterfly/dsdt.asl +++ b/src/mainboard/google/butterfly/dsdt.asl @@ -52,6 +52,5 @@ DefinitionBlock( #include <vendorcode/google/chromeos/acpi/chromeos.asl> - /* Chipset specific sleep states */ #include <southbridge/intel/common/acpi/sleepstates.asl> } diff --git a/src/mainboard/google/cyan/dsdt.asl b/src/mainboard/google/cyan/dsdt.asl index 53a92e0a41..45aeeb4224 100644 --- a/src/mainboard/google/cyan/dsdt.asl +++ b/src/mainboard/google/cyan/dsdt.asl @@ -60,7 +60,6 @@ DefinitionBlock( } #include <vendorcode/google/chromeos/acpi/chromeos.asl> - /* Chipset specific sleep states */ #include <southbridge/intel/common/acpi/sleepstates.asl> #include "acpi/mainboard.asl" diff --git a/src/mainboard/google/dragonegg/dsdt.asl b/src/mainboard/google/dragonegg/dsdt.asl index cb2ce64a78..24814da9f8 100644 --- a/src/mainboard/google/dragonegg/dsdt.asl +++ b/src/mainboard/google/dragonegg/dsdt.asl @@ -47,7 +47,6 @@ DefinitionBlock( #include <vendorcode/google/chromeos/acpi/chromeos.asl> #endif - // Chipset specific sleep states #include <southbridge/intel/common/acpi/sleepstates.asl> /* Chrome OS Embedded Controller */ diff --git a/src/mainboard/google/drallion/dsdt.asl b/src/mainboard/google/drallion/dsdt.asl index 92470a925b..78c6c16a33 100644 --- a/src/mainboard/google/drallion/dsdt.asl +++ b/src/mainboard/google/drallion/dsdt.asl @@ -52,7 +52,6 @@ DefinitionBlock( #include <vendorcode/google/chromeos/acpi/amac.asl> #endif - /* Chipset specific sleep states */ #include <southbridge/intel/common/acpi/sleepstates.asl> /* Low power idle table */ diff --git a/src/mainboard/google/eve/dsdt.asl b/src/mainboard/google/eve/dsdt.asl index 90463c85aa..5615e43e54 100644 --- a/src/mainboard/google/eve/dsdt.asl +++ b/src/mainboard/google/eve/dsdt.asl @@ -46,7 +46,6 @@ DefinitionBlock( /* Chrome OS specific */ #include <vendorcode/google/chromeos/acpi/chromeos.asl> - /* Chipset specific sleep states */ #include <southbridge/intel/common/acpi/sleepstates.asl> /* Chrome OS Embedded Controller */ diff --git a/src/mainboard/google/fizz/dsdt.asl b/src/mainboard/google/fizz/dsdt.asl index 613fe31b26..b847df6b97 100644 --- a/src/mainboard/google/fizz/dsdt.asl +++ b/src/mainboard/google/fizz/dsdt.asl @@ -46,7 +46,6 @@ DefinitionBlock( /* Chrome OS specific */ #include <vendorcode/google/chromeos/acpi/chromeos.asl> - /* Chipset specific sleep states */ #include <southbridge/intel/common/acpi/sleepstates.asl> /* Chrome OS Embedded Controller */ diff --git a/src/mainboard/google/glados/dsdt.asl b/src/mainboard/google/glados/dsdt.asl index 06209e4141..fbb2371449 100644 --- a/src/mainboard/google/glados/dsdt.asl +++ b/src/mainboard/google/glados/dsdt.asl @@ -47,7 +47,6 @@ DefinitionBlock( // Chrome OS specific #include <vendorcode/google/chromeos/acpi/chromeos.asl> - // Chipset specific sleep states #include <southbridge/intel/common/acpi/sleepstates.asl> // Mainboard specific diff --git a/src/mainboard/google/hatch/dsdt.asl b/src/mainboard/google/hatch/dsdt.asl index 8807191fcb..1a0ff68212 100644 --- a/src/mainboard/google/hatch/dsdt.asl +++ b/src/mainboard/google/hatch/dsdt.asl @@ -47,7 +47,6 @@ DefinitionBlock( #include <vendorcode/google/chromeos/acpi/chromeos.asl> #endif - /* Chipset specific sleep states */ #include <southbridge/intel/common/acpi/sleepstates.asl> /* Low power idle table */ diff --git a/src/mainboard/google/jecht/dsdt.asl b/src/mainboard/google/jecht/dsdt.asl index 1cd2bd3e57..66e66eb316 100644 --- a/src/mainboard/google/jecht/dsdt.asl +++ b/src/mainboard/google/jecht/dsdt.asl @@ -50,7 +50,6 @@ DefinitionBlock( // Chrome OS specific #include <vendorcode/google/chromeos/acpi/chromeos.asl> - // Chipset specific sleep states #include <southbridge/intel/common/acpi/sleepstates.asl> // Mainboard specific diff --git a/src/mainboard/google/link/dsdt.asl b/src/mainboard/google/link/dsdt.asl index b39631909e..a7e60f39cd 100644 --- a/src/mainboard/google/link/dsdt.asl +++ b/src/mainboard/google/link/dsdt.asl @@ -53,6 +53,5 @@ DefinitionBlock( #include <vendorcode/google/chromeos/acpi/chromeos.asl> - /* Chipset specific sleep states */ #include <southbridge/intel/common/acpi/sleepstates.asl> } diff --git a/src/mainboard/google/octopus/dsdt.asl b/src/mainboard/google/octopus/dsdt.asl index 2b6c33f667..b19390913b 100644 --- a/src/mainboard/google/octopus/dsdt.asl +++ b/src/mainboard/google/octopus/dsdt.asl @@ -44,7 +44,6 @@ DefinitionBlock( /* Chrome OS specific */ #include <vendorcode/google/chromeos/acpi/chromeos.asl> - /* Chipset specific sleep states */ #include <southbridge/intel/common/acpi/sleepstates.asl> /* Chrome OS Embedded Controller */ diff --git a/src/mainboard/google/parrot/dsdt.asl b/src/mainboard/google/parrot/dsdt.asl index a7623265c7..f03d010fc9 100644 --- a/src/mainboard/google/parrot/dsdt.asl +++ b/src/mainboard/google/parrot/dsdt.asl @@ -53,6 +53,5 @@ DefinitionBlock( #include <vendorcode/google/chromeos/acpi/chromeos.asl> - /* Chipset specific sleep states */ #include <southbridge/intel/common/acpi/sleepstates.asl> } diff --git a/src/mainboard/google/poppy/dsdt.asl b/src/mainboard/google/poppy/dsdt.asl index ce2f8fc43d..bf8d221832 100644 --- a/src/mainboard/google/poppy/dsdt.asl +++ b/src/mainboard/google/poppy/dsdt.asl @@ -53,7 +53,6 @@ DefinitionBlock( /* Chrome OS specific */ #include <vendorcode/google/chromeos/acpi/chromeos.asl> - /* Chipset specific sleep states */ #include <southbridge/intel/common/acpi/sleepstates.asl> /* Chrome OS Embedded Controller */ diff --git a/src/mainboard/google/rambi/dsdt.asl b/src/mainboard/google/rambi/dsdt.asl index ed57e43131..8adde36cd2 100644 --- a/src/mainboard/google/rambi/dsdt.asl +++ b/src/mainboard/google/rambi/dsdt.asl @@ -46,7 +46,6 @@ DefinitionBlock( #include <vendorcode/google/chromeos/acpi/chromeos.asl> - /* Chipset specific sleep states */ #include <southbridge/intel/common/acpi/sleepstates.asl> #include "acpi/mainboard.asl" diff --git a/src/mainboard/google/reef/dsdt.asl b/src/mainboard/google/reef/dsdt.asl index 29b816586c..6de58d85c8 100644 --- a/src/mainboard/google/reef/dsdt.asl +++ b/src/mainboard/google/reef/dsdt.asl @@ -44,7 +44,6 @@ DefinitionBlock( /* Chrome OS specific */ #include <vendorcode/google/chromeos/acpi/chromeos.asl> - /* Chipset specific sleep states */ #include <southbridge/intel/common/acpi/sleepstates.asl> /* Chrome OS Embedded Controller */ diff --git a/src/mainboard/google/sarien/dsdt.asl b/src/mainboard/google/sarien/dsdt.asl index 99a8627853..a809b75e01 100644 --- a/src/mainboard/google/sarien/dsdt.asl +++ b/src/mainboard/google/sarien/dsdt.asl @@ -52,7 +52,6 @@ DefinitionBlock( #include <vendorcode/google/chromeos/acpi/amac.asl> #endif - /* Chipset specific sleep states */ #include <southbridge/intel/common/acpi/sleepstates.asl> /* Low power idle table */ diff --git a/src/mainboard/google/slippy/dsdt.asl b/src/mainboard/google/slippy/dsdt.asl index 9881a5ff8c..010467965e 100644 --- a/src/mainboard/google/slippy/dsdt.asl +++ b/src/mainboard/google/slippy/dsdt.asl @@ -62,6 +62,5 @@ DefinitionBlock( // Chrome OS specific #include <vendorcode/google/chromeos/acpi/chromeos.asl> - // Chipset specific sleep states #include <southbridge/intel/common/acpi/sleepstates.asl> } diff --git a/src/mainboard/google/stout/dsdt.asl b/src/mainboard/google/stout/dsdt.asl index a62fed2380..b89766e62d 100644 --- a/src/mainboard/google/stout/dsdt.asl +++ b/src/mainboard/google/stout/dsdt.asl @@ -53,6 +53,5 @@ DefinitionBlock( #include <vendorcode/google/chromeos/acpi/chromeos.asl> - /* Chipset specific sleep states */ #include <southbridge/intel/common/acpi/sleepstates.asl> } diff --git a/src/mainboard/ibase/mb899/dsdt.asl b/src/mainboard/ibase/mb899/dsdt.asl index 45cc48ff9a..7d545798bc 100644 --- a/src/mainboard/ibase/mb899/dsdt.asl +++ b/src/mainboard/ibase/mb899/dsdt.asl @@ -45,6 +45,5 @@ DefinitionBlock( } } - /* Chipset specific sleep states */ #include <southbridge/intel/common/acpi/sleepstates.asl> } diff --git a/src/mainboard/intel/apollolake_rvp/dsdt.asl b/src/mainboard/intel/apollolake_rvp/dsdt.asl index 9dd8879706..ba17f289da 100644 --- a/src/mainboard/intel/apollolake_rvp/dsdt.asl +++ b/src/mainboard/intel/apollolake_rvp/dsdt.asl @@ -32,7 +32,6 @@ DefinitionBlock( } } - /* Chipset specific sleep states */ #include <southbridge/intel/common/acpi/sleepstates.asl> } diff --git a/src/mainboard/intel/baskingridge/dsdt.asl b/src/mainboard/intel/baskingridge/dsdt.asl index 066160d3e1..34b14e2382 100644 --- a/src/mainboard/intel/baskingridge/dsdt.asl +++ b/src/mainboard/intel/baskingridge/dsdt.asl @@ -50,6 +50,5 @@ DefinitionBlock( #include <vendorcode/google/chromeos/acpi/chromeos.asl> - /* Chipset specific sleep states */ #include <southbridge/intel/common/acpi/sleepstates.asl> } diff --git a/src/mainboard/intel/cannonlake_rvp/dsdt.asl b/src/mainboard/intel/cannonlake_rvp/dsdt.asl index 4fe13d44f6..26f1565b6a 100644 --- a/src/mainboard/intel/cannonlake_rvp/dsdt.asl +++ b/src/mainboard/intel/cannonlake_rvp/dsdt.asl @@ -43,7 +43,6 @@ DefinitionBlock( #include <vendorcode/google/chromeos/acpi/chromeos.asl> #endif - // Chipset specific sleep states #include <southbridge/intel/common/acpi/sleepstates.asl> } diff --git a/src/mainboard/intel/coffeelake_rvp/dsdt.asl b/src/mainboard/intel/coffeelake_rvp/dsdt.asl index 10418c3e64..58a10d9b90 100644 --- a/src/mainboard/intel/coffeelake_rvp/dsdt.asl +++ b/src/mainboard/intel/coffeelake_rvp/dsdt.asl @@ -43,7 +43,6 @@ DefinitionBlock( #include <vendorcode/google/chromeos/acpi/chromeos.asl> #endif - // Chipset specific sleep states #include <southbridge/intel/common/acpi/sleepstates.asl> } diff --git a/src/mainboard/intel/d510mo/dsdt.asl b/src/mainboard/intel/d510mo/dsdt.asl index e07ecc2801..a0e9b626f7 100644 --- a/src/mainboard/intel/d510mo/dsdt.asl +++ b/src/mainboard/intel/d510mo/dsdt.asl @@ -37,6 +37,5 @@ DefinitionBlock( } } - /* Chipset specific sleep states */ #include <southbridge/intel/common/acpi/sleepstates.asl> } diff --git a/src/mainboard/intel/d945gclf/dsdt.asl b/src/mainboard/intel/d945gclf/dsdt.asl index 7d0ffe046d..be640c505e 100644 --- a/src/mainboard/intel/d945gclf/dsdt.asl +++ b/src/mainboard/intel/d945gclf/dsdt.asl @@ -48,6 +48,5 @@ DefinitionBlock( } } - /* Chipset specific sleep states */ #include <southbridge/intel/common/acpi/sleepstates.asl> } diff --git a/src/mainboard/intel/dg41wv/dsdt.asl b/src/mainboard/intel/dg41wv/dsdt.asl index 31e7c10d3e..cddaa3af4e 100644 --- a/src/mainboard/intel/dg41wv/dsdt.asl +++ b/src/mainboard/intel/dg41wv/dsdt.asl @@ -37,6 +37,5 @@ DefinitionBlock( } } - /* Chipset specific sleep states */ #include <southbridge/intel/common/acpi/sleepstates.asl> } diff --git a/src/mainboard/intel/dg43gt/dsdt.asl b/src/mainboard/intel/dg43gt/dsdt.asl index f36d179534..71d175f705 100644 --- a/src/mainboard/intel/dg43gt/dsdt.asl +++ b/src/mainboard/intel/dg43gt/dsdt.asl @@ -37,6 +37,5 @@ DefinitionBlock( } } - /* Chipset specific sleep states */ #include <southbridge/intel/common/acpi/sleepstates.asl> } diff --git a/src/mainboard/intel/emeraldlake2/dsdt.asl b/src/mainboard/intel/emeraldlake2/dsdt.asl index a27f21292c..baf75b0473 100644 --- a/src/mainboard/intel/emeraldlake2/dsdt.asl +++ b/src/mainboard/intel/emeraldlake2/dsdt.asl @@ -51,6 +51,5 @@ DefinitionBlock( #include <vendorcode/google/chromeos/acpi/chromeos.asl> - /* Chipset specific sleep states */ #include <southbridge/intel/common/acpi/sleepstates.asl> } diff --git a/src/mainboard/intel/glkrvp/dsdt.asl b/src/mainboard/intel/glkrvp/dsdt.asl index d7711be75d..76b3f32954 100644 --- a/src/mainboard/intel/glkrvp/dsdt.asl +++ b/src/mainboard/intel/glkrvp/dsdt.asl @@ -44,7 +44,6 @@ DefinitionBlock( /* Chrome OS specific */ #include <vendorcode/google/chromeos/acpi/chromeos.asl> - /* Chipset specific sleep states */ #include <southbridge/intel/common/acpi/sleepstates.asl> /* Chrome OS Embedded Controller */ diff --git a/src/mainboard/intel/harcuvar/dsdt.asl b/src/mainboard/intel/harcuvar/dsdt.asl index bd32687cb8..f970df936d 100644 --- a/src/mainboard/intel/harcuvar/dsdt.asl +++ b/src/mainboard/intel/harcuvar/dsdt.asl @@ -49,6 +49,5 @@ DefinitionBlock( } } - /* Chipset specific sleep states */ #include <southbridge/intel/common/acpi/sleepstates.asl> } diff --git a/src/mainboard/intel/icelake_rvp/dsdt.asl b/src/mainboard/intel/icelake_rvp/dsdt.asl index 3fd6fcae24..2eab610c42 100644 --- a/src/mainboard/intel/icelake_rvp/dsdt.asl +++ b/src/mainboard/intel/icelake_rvp/dsdt.asl @@ -58,7 +58,6 @@ DefinitionBlock( } #endif - // Chipset specific sleep states #include <southbridge/intel/common/acpi/sleepstates.asl> // Mainboard specific diff --git a/src/mainboard/intel/kblrvp/dsdt.asl b/src/mainboard/intel/kblrvp/dsdt.asl index 84872cb62d..e34b6c768f 100644 --- a/src/mainboard/intel/kblrvp/dsdt.asl +++ b/src/mainboard/intel/kblrvp/dsdt.asl @@ -55,7 +55,6 @@ DefinitionBlock( #include <vendorcode/google/chromeos/acpi/chromeos.asl> #endif - // Chipset specific sleep states #include <southbridge/intel/common/acpi/sleepstates.asl> // Mainboard specific diff --git a/src/mainboard/intel/kunimitsu/dsdt.asl b/src/mainboard/intel/kunimitsu/dsdt.asl index 06209e4141..fbb2371449 100644 --- a/src/mainboard/intel/kunimitsu/dsdt.asl +++ b/src/mainboard/intel/kunimitsu/dsdt.asl @@ -47,7 +47,6 @@ DefinitionBlock( // Chrome OS specific #include <vendorcode/google/chromeos/acpi/chromeos.asl> - // Chipset specific sleep states #include <southbridge/intel/common/acpi/sleepstates.asl> // Mainboard specific diff --git a/src/mainboard/intel/leafhill/dsdt.asl b/src/mainboard/intel/leafhill/dsdt.asl index 6fccf4917c..94dc024b32 100644 --- a/src/mainboard/intel/leafhill/dsdt.asl +++ b/src/mainboard/intel/leafhill/dsdt.asl @@ -38,6 +38,5 @@ DefinitionBlock( } } - /* Chipset specific sleep states */ #include <southbridge/intel/common/acpi/sleepstates.asl> } diff --git a/src/mainboard/intel/minnow3/dsdt.asl b/src/mainboard/intel/minnow3/dsdt.asl index 6fccf4917c..94dc024b32 100644 --- a/src/mainboard/intel/minnow3/dsdt.asl +++ b/src/mainboard/intel/minnow3/dsdt.asl @@ -38,6 +38,5 @@ DefinitionBlock( } } - /* Chipset specific sleep states */ #include <southbridge/intel/common/acpi/sleepstates.asl> } diff --git a/src/mainboard/intel/saddlebrook/dsdt.asl b/src/mainboard/intel/saddlebrook/dsdt.asl index b88b1d20f4..8d6dc2e6dd 100644 --- a/src/mainboard/intel/saddlebrook/dsdt.asl +++ b/src/mainboard/intel/saddlebrook/dsdt.asl @@ -41,7 +41,6 @@ DefinitionBlock( } } - // Chipset specific sleep states #include <southbridge/intel/common/acpi/sleepstates.asl> // Mainboard specific diff --git a/src/mainboard/intel/strago/dsdt.asl b/src/mainboard/intel/strago/dsdt.asl index 7bbe1e407c..0028fd7a53 100644 --- a/src/mainboard/intel/strago/dsdt.asl +++ b/src/mainboard/intel/strago/dsdt.asl @@ -56,7 +56,6 @@ DefinitionBlock( } #include <vendorcode/google/chromeos/acpi/chromeos.asl> - /* Chipset specific sleep states */ #include <southbridge/intel/common/acpi/sleepstates.asl> #include "acpi/mainboard.asl" diff --git a/src/mainboard/intel/wtm2/dsdt.asl b/src/mainboard/intel/wtm2/dsdt.asl index 7245983ba0..6bfc172848 100644 --- a/src/mainboard/intel/wtm2/dsdt.asl +++ b/src/mainboard/intel/wtm2/dsdt.asl @@ -53,7 +53,6 @@ DefinitionBlock( // Chrome OS specific #include <vendorcode/google/chromeos/acpi/chromeos.asl> - // Chipset specific sleep states #include <southbridge/intel/common/acpi/sleepstates.asl> // Mainboard specific diff --git a/src/mainboard/kontron/986lcd-m/dsdt.asl b/src/mainboard/kontron/986lcd-m/dsdt.asl index a6ae2843fe..10f4208cff 100644 --- a/src/mainboard/kontron/986lcd-m/dsdt.asl +++ b/src/mainboard/kontron/986lcd-m/dsdt.asl @@ -44,6 +44,5 @@ DefinitionBlock( } } - /* Chipset specific sleep states */ #include <southbridge/intel/common/acpi/sleepstates.asl> } diff --git a/src/mainboard/kontron/ktqm77/dsdt.asl b/src/mainboard/kontron/ktqm77/dsdt.asl index da533b789e..b297a12160 100644 --- a/src/mainboard/kontron/ktqm77/dsdt.asl +++ b/src/mainboard/kontron/ktqm77/dsdt.asl @@ -50,6 +50,5 @@ DefinitionBlock( } } - /* Chipset specific sleep states */ #include <southbridge/intel/common/acpi/sleepstates.asl> } diff --git a/src/mainboard/lenovo/t400/dsdt.asl b/src/mainboard/lenovo/t400/dsdt.asl index c3c7dda6ae..edf69ab359 100644 --- a/src/mainboard/lenovo/t400/dsdt.asl +++ b/src/mainboard/lenovo/t400/dsdt.asl @@ -51,7 +51,6 @@ DefinitionBlock( } } - /* Chipset specific sleep states */ #include <southbridge/intel/common/acpi/sleepstates.asl> /* Hybrid graphics support code */ diff --git a/src/mainboard/lenovo/t410/dsdt.asl b/src/mainboard/lenovo/t410/dsdt.asl index bf00489e80..4f67bd8150 100644 --- a/src/mainboard/lenovo/t410/dsdt.asl +++ b/src/mainboard/lenovo/t410/dsdt.asl @@ -85,7 +85,6 @@ DefinitionBlock( } } - /* Chipset specific sleep states */ #include <southbridge/intel/common/acpi/sleepstates.asl> /* Dock support code */ diff --git a/src/mainboard/lenovo/t420/dsdt.asl b/src/mainboard/lenovo/t420/dsdt.asl index b8418179b4..43cb236439 100644 --- a/src/mainboard/lenovo/t420/dsdt.asl +++ b/src/mainboard/lenovo/t420/dsdt.asl @@ -50,6 +50,5 @@ DefinitionBlock( } } - /* Chipset specific sleep states */ #include <southbridge/intel/common/acpi/sleepstates.asl> } diff --git a/src/mainboard/lenovo/t420s/dsdt.asl b/src/mainboard/lenovo/t420s/dsdt.asl index b8418179b4..43cb236439 100644 --- a/src/mainboard/lenovo/t420s/dsdt.asl +++ b/src/mainboard/lenovo/t420s/dsdt.asl @@ -50,6 +50,5 @@ DefinitionBlock( } } - /* Chipset specific sleep states */ #include <southbridge/intel/common/acpi/sleepstates.asl> } diff --git a/src/mainboard/lenovo/t430s/dsdt.asl b/src/mainboard/lenovo/t430s/dsdt.asl index b8418179b4..43cb236439 100644 --- a/src/mainboard/lenovo/t430s/dsdt.asl +++ b/src/mainboard/lenovo/t430s/dsdt.asl @@ -50,6 +50,5 @@ DefinitionBlock( } } - /* Chipset specific sleep states */ #include <southbridge/intel/common/acpi/sleepstates.asl> } diff --git a/src/mainboard/lenovo/t520/dsdt.asl b/src/mainboard/lenovo/t520/dsdt.asl index b8418179b4..43cb236439 100644 --- a/src/mainboard/lenovo/t520/dsdt.asl +++ b/src/mainboard/lenovo/t520/dsdt.asl @@ -50,6 +50,5 @@ DefinitionBlock( } } - /* Chipset specific sleep states */ #include <southbridge/intel/common/acpi/sleepstates.asl> } diff --git a/src/mainboard/lenovo/t530/dsdt.asl b/src/mainboard/lenovo/t530/dsdt.asl index b8418179b4..43cb236439 100644 --- a/src/mainboard/lenovo/t530/dsdt.asl +++ b/src/mainboard/lenovo/t530/dsdt.asl @@ -50,6 +50,5 @@ DefinitionBlock( } } - /* Chipset specific sleep states */ #include <southbridge/intel/common/acpi/sleepstates.asl> } diff --git a/src/mainboard/lenovo/t60/dsdt.asl b/src/mainboard/lenovo/t60/dsdt.asl index 13742167e8..749f852edf 100644 --- a/src/mainboard/lenovo/t60/dsdt.asl +++ b/src/mainboard/lenovo/t60/dsdt.asl @@ -57,7 +57,6 @@ DefinitionBlock( } } - /* Chipset specific sleep states */ #include <southbridge/intel/common/acpi/sleepstates.asl> // Dock support code diff --git a/src/mainboard/lenovo/thinkcentre_a58/dsdt.asl b/src/mainboard/lenovo/thinkcentre_a58/dsdt.asl index 31e7c10d3e..cddaa3af4e 100644 --- a/src/mainboard/lenovo/thinkcentre_a58/dsdt.asl +++ b/src/mainboard/lenovo/thinkcentre_a58/dsdt.asl @@ -37,6 +37,5 @@ DefinitionBlock( } } - /* Chipset specific sleep states */ #include <southbridge/intel/common/acpi/sleepstates.asl> } diff --git a/src/mainboard/lenovo/x131e/dsdt.asl b/src/mainboard/lenovo/x131e/dsdt.asl index 842afff896..ff80f1599c 100644 --- a/src/mainboard/lenovo/x131e/dsdt.asl +++ b/src/mainboard/lenovo/x131e/dsdt.asl @@ -39,7 +39,6 @@ DefinitionBlock( // global NVS and variables #include <southbridge/intel/bd82x6x/acpi/globalnvs.asl> - // Chipset specific sleep states #include <southbridge/intel/common/acpi/sleepstates.asl> Scope (\_SB) { diff --git a/src/mainboard/lenovo/x1_carbon_gen1/dsdt.asl b/src/mainboard/lenovo/x1_carbon_gen1/dsdt.asl index 96f7e35cdd..de6866d1ad 100644 --- a/src/mainboard/lenovo/x1_carbon_gen1/dsdt.asl +++ b/src/mainboard/lenovo/x1_carbon_gen1/dsdt.asl @@ -50,6 +50,5 @@ DefinitionBlock( } } - /* Chipset specific sleep states */ #include <southbridge/intel/common/acpi/sleepstates.asl> } diff --git a/src/mainboard/lenovo/x200/dsdt.asl b/src/mainboard/lenovo/x200/dsdt.asl index 9052a8f3b8..1290ece4b3 100644 --- a/src/mainboard/lenovo/x200/dsdt.asl +++ b/src/mainboard/lenovo/x200/dsdt.asl @@ -50,7 +50,6 @@ DefinitionBlock( } } - /* Chipset specific sleep states */ #include <southbridge/intel/common/acpi/sleepstates.asl> /* Dock support code */ diff --git a/src/mainboard/lenovo/x201/dsdt.asl b/src/mainboard/lenovo/x201/dsdt.asl index bf00489e80..4f67bd8150 100644 --- a/src/mainboard/lenovo/x201/dsdt.asl +++ b/src/mainboard/lenovo/x201/dsdt.asl @@ -85,7 +85,6 @@ DefinitionBlock( } } - /* Chipset specific sleep states */ #include <southbridge/intel/common/acpi/sleepstates.asl> /* Dock support code */ diff --git a/src/mainboard/lenovo/x220/dsdt.asl b/src/mainboard/lenovo/x220/dsdt.asl index b8418179b4..43cb236439 100644 --- a/src/mainboard/lenovo/x220/dsdt.asl +++ b/src/mainboard/lenovo/x220/dsdt.asl @@ -50,6 +50,5 @@ DefinitionBlock( } } - /* Chipset specific sleep states */ #include <southbridge/intel/common/acpi/sleepstates.asl> } diff --git a/src/mainboard/lenovo/x230/dsdt.asl b/src/mainboard/lenovo/x230/dsdt.asl index b8418179b4..43cb236439 100644 --- a/src/mainboard/lenovo/x230/dsdt.asl +++ b/src/mainboard/lenovo/x230/dsdt.asl @@ -50,6 +50,5 @@ DefinitionBlock( } } - /* Chipset specific sleep states */ #include <southbridge/intel/common/acpi/sleepstates.asl> } diff --git a/src/mainboard/lenovo/x60/dsdt.asl b/src/mainboard/lenovo/x60/dsdt.asl index 6f01f60052..32465d3ef4 100644 --- a/src/mainboard/lenovo/x60/dsdt.asl +++ b/src/mainboard/lenovo/x60/dsdt.asl @@ -51,7 +51,6 @@ DefinitionBlock( } } - /* Chipset specific sleep states */ #include <southbridge/intel/common/acpi/sleepstates.asl> // Dock support code diff --git a/src/mainboard/packardbell/ms2290/dsdt.asl b/src/mainboard/packardbell/ms2290/dsdt.asl index cbfd3a7439..bbd2b2938c 100644 --- a/src/mainboard/packardbell/ms2290/dsdt.asl +++ b/src/mainboard/packardbell/ms2290/dsdt.asl @@ -79,6 +79,5 @@ DefinitionBlock( } } - /* Chipset specific sleep states */ #include <southbridge/intel/common/acpi/sleepstates.asl> } diff --git a/src/mainboard/portwell/m107/dsdt.asl b/src/mainboard/portwell/m107/dsdt.asl index 9b4dc817bf..6fcb39af2f 100644 --- a/src/mainboard/portwell/m107/dsdt.asl +++ b/src/mainboard/portwell/m107/dsdt.asl @@ -43,7 +43,7 @@ DefinitionBlock( } } - /* Chipset specific sleep states */ + /* Mainboard specific sleep states */ #include "acpi/sleepstates.asl" #include "acpi/mainboard.asl" } diff --git a/src/mainboard/purism/librem_bdw/dsdt.asl b/src/mainboard/purism/librem_bdw/dsdt.asl index 3a53a4db28..0e5d7a1fc6 100644 --- a/src/mainboard/purism/librem_bdw/dsdt.asl +++ b/src/mainboard/purism/librem_bdw/dsdt.asl @@ -39,7 +39,6 @@ DefinitionBlock( } } - /* Chipset specific sleep states */ #include <southbridge/intel/common/acpi/sleepstates.asl> /* Mainboard specific */ diff --git a/src/mainboard/purism/librem_skl/dsdt.asl b/src/mainboard/purism/librem_skl/dsdt.asl index b058204faf..0f78d5f7f1 100644 --- a/src/mainboard/purism/librem_skl/dsdt.asl +++ b/src/mainboard/purism/librem_skl/dsdt.asl @@ -42,7 +42,6 @@ DefinitionBlock( } - // Chipset specific sleep states #include <southbridge/intel/common/acpi/sleepstates.asl> // Mainboard specific diff --git a/src/mainboard/razer/blade_stealth_kbl/dsdt.asl b/src/mainboard/razer/blade_stealth_kbl/dsdt.asl index 0112654950..ef487451ea 100644 --- a/src/mainboard/razer/blade_stealth_kbl/dsdt.asl +++ b/src/mainboard/razer/blade_stealth_kbl/dsdt.asl @@ -42,7 +42,7 @@ DefinitionBlock( } } - // Chipset specific sleep states + #include <southbridge/intel/common/acpi/sleepstates.asl> #include "acpi/mainboard.asl" diff --git a/src/mainboard/roda/rk886ex/dsdt.asl b/src/mainboard/roda/rk886ex/dsdt.asl index 7011b44c6e..a27ba350fa 100644 --- a/src/mainboard/roda/rk886ex/dsdt.asl +++ b/src/mainboard/roda/rk886ex/dsdt.asl @@ -49,6 +49,5 @@ DefinitionBlock( } } - /* Chipset specific sleep states */ #include <southbridge/intel/common/acpi/sleepstates.asl> } diff --git a/src/mainboard/roda/rk9/dsdt.asl b/src/mainboard/roda/rk9/dsdt.asl index 0206926ff3..c9bd5c7d18 100644 --- a/src/mainboard/roda/rk9/dsdt.asl +++ b/src/mainboard/roda/rk9/dsdt.asl @@ -51,6 +51,5 @@ DefinitionBlock( } } - /* Chipset specific sleep states */ #include <southbridge/intel/common/acpi/sleepstates.asl> } diff --git a/src/mainboard/roda/rv11/dsdt.asl b/src/mainboard/roda/rv11/dsdt.asl index 1784b540c9..fb3b227949 100644 --- a/src/mainboard/roda/rv11/dsdt.asl +++ b/src/mainboard/roda/rv11/dsdt.asl @@ -48,6 +48,5 @@ DefinitionBlock( } } - /* Chipset specific sleep states */ #include <southbridge/intel/common/acpi/sleepstates.asl> } diff --git a/src/mainboard/samsung/lumpy/dsdt.asl b/src/mainboard/samsung/lumpy/dsdt.asl index 3ecabb5935..eaa36468e9 100644 --- a/src/mainboard/samsung/lumpy/dsdt.asl +++ b/src/mainboard/samsung/lumpy/dsdt.asl @@ -54,6 +54,5 @@ DefinitionBlock( #include <vendorcode/google/chromeos/acpi/chromeos.asl> - /* Chipset specific sleep states */ #include <southbridge/intel/common/acpi/sleepstates.asl> } diff --git a/src/mainboard/samsung/stumpy/dsdt.asl b/src/mainboard/samsung/stumpy/dsdt.asl index 9fc9e2f9ff..1298368ee0 100644 --- a/src/mainboard/samsung/stumpy/dsdt.asl +++ b/src/mainboard/samsung/stumpy/dsdt.asl @@ -51,6 +51,5 @@ DefinitionBlock( #include <vendorcode/google/chromeos/acpi/chromeos.asl> - /* Chipset specific sleep states */ #include <southbridge/intel/common/acpi/sleepstates.asl> } diff --git a/src/mainboard/scaleway/tagada/dsdt.asl b/src/mainboard/scaleway/tagada/dsdt.asl index bd32687cb8..f970df936d 100644 --- a/src/mainboard/scaleway/tagada/dsdt.asl +++ b/src/mainboard/scaleway/tagada/dsdt.asl @@ -49,6 +49,5 @@ DefinitionBlock( } } - /* Chipset specific sleep states */ #include <southbridge/intel/common/acpi/sleepstates.asl> } diff --git a/src/mainboard/siemens/mc_apl1/dsdt.asl b/src/mainboard/siemens/mc_apl1/dsdt.asl index ae40f39514..8e08b16626 100644 --- a/src/mainboard/siemens/mc_apl1/dsdt.asl +++ b/src/mainboard/siemens/mc_apl1/dsdt.asl @@ -40,6 +40,5 @@ DefinitionBlock( } } - /* Chipset specific sleep states */ #include <southbridge/intel/common/acpi/sleepstates.asl> } diff --git a/src/mainboard/supermicro/x11-lga1151-series/dsdt.asl b/src/mainboard/supermicro/x11-lga1151-series/dsdt.asl index b88b1d20f4..8d6dc2e6dd 100644 --- a/src/mainboard/supermicro/x11-lga1151-series/dsdt.asl +++ b/src/mainboard/supermicro/x11-lga1151-series/dsdt.asl @@ -41,7 +41,6 @@ DefinitionBlock( } } - // Chipset specific sleep states #include <southbridge/intel/common/acpi/sleepstates.asl> // Mainboard specific diff --git a/src/mainboard/up/squared/dsdt.asl b/src/mainboard/up/squared/dsdt.asl index 6fccf4917c..94dc024b32 100644 --- a/src/mainboard/up/squared/dsdt.asl +++ b/src/mainboard/up/squared/dsdt.asl @@ -38,6 +38,5 @@ DefinitionBlock( } } - /* Chipset specific sleep states */ #include <southbridge/intel/common/acpi/sleepstates.asl> } |