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| author | Samuel Verstraete <samuel.verstraete@gmail.com> | 2009-05-12 15:15:07 +0000 |
|---|---|---|
| committer | Myles Watson <mylesgw@gmail.com> | 2009-05-12 15:15:07 +0000 |
| commit | 459259e98dc9071279f385ea18c58993e2e66b9b (patch) | |
| tree | 04372c4406dd772948cb8dcafda0d2685ed78b49 /src | |
| parent | 1c7cf64f1ea8407f1bc541c9f16fec872d52b450 (diff) | |
| download | coreboot-459259e98dc9071279f385ea18c58993e2e66b9b.tar.xz | |
This is the final patch that got everything working for me with the HP dl145g3.
I would like to remind you that this firmware enables the hardware
virtualization on the AMD cpu's on the machine. That feature was
explicitly disabled by the factory BIOS.
Due to an error in the VGAROM no other rom loader (YABEL or X*^BIOS)
than SeaBIOS manages to load the VGA rom. The VGA ROM tries to read
config space of a device that is actually not present.
Because SeaBIOS does not support AHCI SATA it can not start the
bootable drive of the machine so i had to add filo to seabios to
manage booting:
./cbfstool coreboot.rom add-payload filo.elf img/FILO
Signed-off-by: Samuel Verstraete <samuel.verstraete@gmail.com>
Acked-by: Myles Watson <mylesgw@gmail.com>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4277 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
Diffstat (limited to 'src')
| -rw-r--r-- | src/mainboard/hp/dl145_g3/Config.lb | 11 | ||||
| -rw-r--r-- | src/mainboard/hp/dl145_g3/Options.lb | 2 |
2 files changed, 3 insertions, 10 deletions
diff --git a/src/mainboard/hp/dl145_g3/Config.lb b/src/mainboard/hp/dl145_g3/Config.lb index 1095cde182..3e602e2ed2 100644 --- a/src/mainboard/hp/dl145_g3/Config.lb +++ b/src/mainboard/hp/dl145_g3/Config.lb @@ -192,15 +192,8 @@ chip northbridge/amd/amdk8/root_complex device pci 2.0 on end # USB 0x0223 device pci 2.1 on end # USB device pci 2.2 on end # USB - chip drivers/pci/onboard - # it is in bcm5785_0 bus, but the device id can - # not be changed even unitid is changed, fake one - # to get the rom_address - # if HT_CHAIN_END_UNITID_BASE=0, it is 4, - # if HT_CHAIN_END_UNITID_BASE=1, it is 3 - device pci 4.0 on end - register "rom_address" = "0xfff00000" - end + device pci 3.0 on end # VGA + #bx_a013+ start #chip drivers/pci/onboard #SATA2 # device pci 5.0 on end diff --git a/src/mainboard/hp/dl145_g3/Options.lb b/src/mainboard/hp/dl145_g3/Options.lb index 2d7b9d959d..5fda0e5f8b 100644 --- a/src/mainboard/hp/dl145_g3/Options.lb +++ b/src/mainboard/hp/dl145_g3/Options.lb @@ -194,7 +194,7 @@ default K8_HT_FREQ_1G_SUPPORT=1 #VGA Console default CONFIG_CONSOLE_VGA=1 -default CONFIG_PCI_ROM_RUN=1 +default CONFIG_PCI_ROM_RUN=0 #HT Unit ID offset, default is 1, the typical one default HT_CHAIN_UNITID_BASE=0x06 |