diff options
| author | Stefan Reinauer <reinauer@chromium.org> | 2013-02-12 14:17:15 -0800 |
|---|---|---|
| committer | Ronald G. Minnich <rminnich@gmail.com> | 2013-02-14 02:00:10 +0100 |
| commit | 4aff4458f58398f54c248604694c7005294c1747 (patch) | |
| tree | eb3d9259255abc486a4d6d9eb53199b4d408053e /src | |
| parent | dc8259ce1d2e866f3133da49c1d6f4773f5698c1 (diff) | |
| download | coreboot-4aff4458f58398f54c248604694c7005294c1747.tar.xz | |
sconfig: rename pci_domain -> domain
The name pci_domain was a bit misleading, since the construct is only
PCI specific in a particular (northbridge/cpu) implementation, but not
by concept. As implementations and hardware change, be more generic
about our naming. This will allow us to support non-PCI systems without
adding new keywords.
Change-Id: Ide885a1d5e15d37560c79b936a39252150560e85
Signed-off-by: Stefan Reinauer <reinauer@google.com>
Reviewed-on: http://review.coreboot.org/2376
Tested-by: build bot (Jenkins)
Reviewed-by: Ronald G. Minnich <rminnich@gmail.com>
Diffstat (limited to 'src')
223 files changed, 302 insertions, 302 deletions
diff --git a/src/arch/x86/boot/mpspec.c b/src/arch/x86/boot/mpspec.c index cf346a5d67..5d014343d3 100644 --- a/src/arch/x86/boot/mpspec.c +++ b/src/arch/x86/boot/mpspec.c @@ -502,7 +502,7 @@ unsigned long __attribute__((weak)) write_smp_table(unsigned long addr) break; } - if (parent->path.type == DEVICE_PATH_PCI_DOMAIN) { + if (parent->path.type == DEVICE_PATH_DOMAIN) { printk(BIOS_WARNING, "no IRQ found for %s\n", dev_path(dev)); break; } diff --git a/src/cpu/amd/sc520/sc520.c b/src/cpu/amd/sc520/sc520.c index 6954f4425e..b0824a74a8 100644 --- a/src/cpu/amd/sc520/sc520.c +++ b/src/cpu/amd/sc520/sc520.c @@ -186,7 +186,7 @@ static void enable_dev(struct device *dev) { printk(BIOS_SPEW, "%s\n", __func__); /* Set the operations if it is a special bus type */ - if (dev->path.type == DEVICE_PATH_PCI_DOMAIN) { + if (dev->path.type == DEVICE_PATH_DOMAIN) { dev->ops = &pci_domain_ops; pci_set_method(dev); } diff --git a/src/device/device.c b/src/device/device.c index 07bbc7a72a..e0c8bf0523 100644 --- a/src/device/device.c +++ b/src/device/device.c @@ -994,7 +994,7 @@ void dev_configure(void) /* Compute resources for all domains. */ for (child = root->link_list->children; child; child = child->sibling) { - if (!(child->path.type == DEVICE_PATH_PCI_DOMAIN)) + if (!(child->path.type == DEVICE_PATH_DOMAIN)) continue; for (res = child->resource_list; res; res = res->next) { if (res->flags & IORESOURCE_FIXED) @@ -1019,7 +1019,7 @@ void dev_configure(void) /* For all domains. */ for (child = root->link_list->children; child; child=child->sibling) - if (child->path.type == DEVICE_PATH_PCI_DOMAIN) + if (child->path.type == DEVICE_PATH_DOMAIN) avoid_fixed_resources(child); /* @@ -1027,7 +1027,7 @@ void dev_configure(void) * the highest address managable. */ for (child = root->link_list->children; child; child = child->sibling) { - if (child->path.type != DEVICE_PATH_PCI_DOMAIN) + if (child->path.type != DEVICE_PATH_DOMAIN) continue; for (res = child->resource_list; res; res = res->next) { if (!(res->flags & IORESOURCE_MEM) || @@ -1040,7 +1040,7 @@ void dev_configure(void) /* Store the computed resource allocations into device registers ... */ printk(BIOS_INFO, "Setting resources...\n"); for (child = root->link_list->children; child; child = child->sibling) { - if (!(child->path.type == DEVICE_PATH_PCI_DOMAIN)) + if (!(child->path.type == DEVICE_PATH_DOMAIN)) continue; for (res = child->resource_list; res; res = res->next) { if (res->flags & IORESOURCE_FIXED) diff --git a/src/device/device_util.c b/src/device/device_util.c index 224c58ee64..60f555af3c 100644 --- a/src/device/device_util.c +++ b/src/device/device_util.c @@ -205,9 +205,9 @@ const char *dev_path(device_t dev) sprintf(buffer, "IOAPIC: %02x", dev->path.ioapic.ioapic_id); break; - case DEVICE_PATH_PCI_DOMAIN: - sprintf(buffer, "PCI_DOMAIN: %04x", - dev->path.pci_domain.domain); + case DEVICE_PATH_DOMAIN: + sprintf(buffer, "DOMAIN: %04x", + dev->path.domain.domain); break; case DEVICE_PATH_APIC_CLUSTER: sprintf(buffer, "APIC_CLUSTER: %01x", @@ -271,8 +271,8 @@ int path_eq(struct device_path *path1, struct device_path *path2) case DEVICE_PATH_APIC: equal = (path1->apic.apic_id == path2->apic.apic_id); break; - case DEVICE_PATH_PCI_DOMAIN: - equal = (path1->pci_domain.domain == path2->pci_domain.domain); + case DEVICE_PATH_DOMAIN: + equal = (path1->domain.domain == path2->domain.domain); break; case DEVICE_PATH_APIC_CLUSTER: equal = (path1->apic_cluster.cluster diff --git a/src/include/device/path.h b/src/include/device/path.h index 16ad8f9089..c59b49ed24 100644 --- a/src/include/device/path.h +++ b/src/include/device/path.h @@ -8,14 +8,14 @@ enum device_path_type { DEVICE_PATH_PNP, DEVICE_PATH_I2C, DEVICE_PATH_APIC, - DEVICE_PATH_PCI_DOMAIN, + DEVICE_PATH_DOMAIN, DEVICE_PATH_APIC_CLUSTER, DEVICE_PATH_CPU, DEVICE_PATH_CPU_BUS, DEVICE_PATH_IOAPIC, }; -struct pci_domain_path +struct domain_path { unsigned domain; }; @@ -74,7 +74,7 @@ struct device_path { struct i2c_path i2c; struct apic_path apic; struct ioapic_path ioapic; - struct pci_domain_path pci_domain; + struct domain_path domain; struct apic_cluster_path apic_cluster; struct cpu_path cpu; struct cpu_bus_path cpu_bus; diff --git a/src/mainboard/a-trend/atc-6220/devicetree.cb b/src/mainboard/a-trend/atc-6220/devicetree.cb index 4ab61c4ebd..3e83186e7d 100644 --- a/src/mainboard/a-trend/atc-6220/devicetree.cb +++ b/src/mainboard/a-trend/atc-6220/devicetree.cb @@ -4,7 +4,7 @@ chip northbridge/intel/i440bx # Northbridge device lapic 0 on end # APIC end end - device pci_domain 0 on # PCI domain + device domain 0 on # PCI domain device pci 0.0 on end # Host bridge device pci 1.0 on end # PCI/AGP bridge chip southbridge/intel/i82371eb # Southbridge diff --git a/src/mainboard/a-trend/atc-6240/devicetree.cb b/src/mainboard/a-trend/atc-6240/devicetree.cb index 7a2b9a92ab..7625fa6e42 100644 --- a/src/mainboard/a-trend/atc-6240/devicetree.cb +++ b/src/mainboard/a-trend/atc-6240/devicetree.cb @@ -4,7 +4,7 @@ chip northbridge/intel/i440bx # Northbridge device lapic 0 on end # APIC end end - device pci_domain 0 on # PCI domain + device domain 0 on # PCI domain device pci 0.0 on end # Host bridge device pci 1.0 on end # PCI/AGP bridge chip southbridge/intel/i82371eb # Southbridge diff --git a/src/mainboard/aaeon/pfm-540i_revb/devicetree.cb b/src/mainboard/aaeon/pfm-540i_revb/devicetree.cb index 3987584d80..9737b010e2 100644 --- a/src/mainboard/aaeon/pfm-540i_revb/devicetree.cb +++ b/src/mainboard/aaeon/pfm-540i_revb/devicetree.cb @@ -1,5 +1,5 @@ chip northbridge/amd/lx - device pci_domain 0 on + device domain 0 on device pci 1.0 on end # Northbridge device pci 1.1 on end # Graphics device pci 1.2 on end # AES diff --git a/src/mainboard/abit/be6-ii_v2_0/devicetree.cb b/src/mainboard/abit/be6-ii_v2_0/devicetree.cb index 9c7cf56fc2..a85a86162e 100644 --- a/src/mainboard/abit/be6-ii_v2_0/devicetree.cb +++ b/src/mainboard/abit/be6-ii_v2_0/devicetree.cb @@ -4,7 +4,7 @@ chip northbridge/intel/i440bx # Northbridge device lapic 0 on end # APIC end end - device pci_domain 0 on # PCI domain + device domain 0 on # PCI domain device pci 0.0 on end # Host bridge device pci 1.0 on end # PCI/AGP bridge chip southbridge/intel/i82371eb # Southbridge diff --git a/src/mainboard/advansus/a785e-i/devicetree.cb b/src/mainboard/advansus/a785e-i/devicetree.cb index 79df8c90bd..a356f79560 100644 --- a/src/mainboard/advansus/a785e-i/devicetree.cb +++ b/src/mainboard/advansus/a785e-i/devicetree.cb @@ -5,7 +5,7 @@ chip northbridge/amd/amdfam10/root_complex device lapic 0 on end end end - device pci_domain 0 on + device domain 0 on subsystemid 0x1612 0x3060 inherit #TODO: Set the correctly subsystem id. chip northbridge/amd/amdfam10 device pci 18.0 on # northbridge @@ -120,5 +120,5 @@ chip northbridge/amd/amdfam10/root_complex device pci 18.3 on end device pci 18.4 on end end - end #pci_domain + end #domain end diff --git a/src/mainboard/advantech/pcm-5820/devicetree.cb b/src/mainboard/advantech/pcm-5820/devicetree.cb index b77fd06b49..8027ee20aa 100644 --- a/src/mainboard/advantech/pcm-5820/devicetree.cb +++ b/src/mainboard/advantech/pcm-5820/devicetree.cb @@ -1,5 +1,5 @@ chip northbridge/amd/gx1 # Northbridge - device pci_domain 0 on # PCI domain + device domain 0 on # PCI domain device pci 0.0 on end # Host bridge chip southbridge/amd/cs5530 # Southbridge device pci 12.0 on # ISA bridge diff --git a/src/mainboard/amd/bimini_fam10/devicetree.cb b/src/mainboard/amd/bimini_fam10/devicetree.cb index a5bec74e64..cc624664e0 100644 --- a/src/mainboard/amd/bimini_fam10/devicetree.cb +++ b/src/mainboard/amd/bimini_fam10/devicetree.cb @@ -5,7 +5,7 @@ chip northbridge/amd/amdfam10/root_complex device lapic 0 on end end end - device pci_domain 0 on + device domain 0 on subsystemid 0x1022 0x3060 inherit chip northbridge/amd/amdfam10 device pci 18.0 on # northbridge @@ -76,9 +76,9 @@ chip northbridge/amd/amdfam10/root_complex device pci 18.3 on end device pci 18.4 on end end - end #pci_domain + end #domain #for node 32 to node 63 -# device pci_domain 0 on +# device domain 0 on # chip northbridge/amd/amdfam10 # device pci 00.0 on end# northbridge # device pci 00.0 on end @@ -90,7 +90,7 @@ chip northbridge/amd/amdfam10/root_complex # device pci 00.4 on end # device pci 00.5 on end # end -# end #pci_domain +# end #domain # chip drivers/generic/debug # device pnp 0.0 off end # chip name diff --git a/src/mainboard/amd/db800/devicetree.cb b/src/mainboard/amd/db800/devicetree.cb index e0f20dc9b7..1a1db6d5f6 100644 --- a/src/mainboard/amd/db800/devicetree.cb +++ b/src/mainboard/amd/db800/devicetree.cb @@ -1,5 +1,5 @@ chip northbridge/amd/lx - device pci_domain 0 on + device domain 0 on device pci 1.0 on end # Northbridge device pci 1.1 on end # Graphics chip southbridge/amd/cs5536 diff --git a/src/mainboard/amd/dbm690t/devicetree.cb b/src/mainboard/amd/dbm690t/devicetree.cb index e1b01b2c06..b92a66656a 100644 --- a/src/mainboard/amd/dbm690t/devicetree.cb +++ b/src/mainboard/amd/dbm690t/devicetree.cb @@ -14,7 +14,7 @@ chip northbridge/amd/amdk8/root_complex device lapic 0 on end end end - device pci_domain 0 on + device domain 0 on subsystemid 0x1022 0x3050 inherit chip northbridge/amd/amdk8 device pci 18.0 on # southbridge @@ -117,6 +117,6 @@ chip northbridge/amd/amdk8/root_complex device pci 18.2 on end device pci 18.3 on end end #northbridge/amd/amdk8 - end #pci_domain + end #domain end #northbridge/amd/amdk8/root_complex diff --git a/src/mainboard/amd/dinar/devicetree.cb b/src/mainboard/amd/dinar/devicetree.cb index 3211a2f8a5..9e2c61a6aa 100644 --- a/src/mainboard/amd/dinar/devicetree.cb +++ b/src/mainboard/amd/dinar/devicetree.cb @@ -23,7 +23,7 @@ chip northbridge/amd/agesa/family15/root_complex device lapic 0x20 on end end end - device pci_domain 0 on + device domain 0 on subsystemid 0x1022 0x1705 inherit chip northbridge/amd/agesa/family15 # CPU side of HT root complex device pci 18.0 on # Put IO-HUB at link_num 0, Instead of HT Link topology to satisfy both f10 and f15 CPUs @@ -98,6 +98,6 @@ chip northbridge/amd/agesa/family15/root_complex device pci 18.4 on end device pci 18.5 on end end #chip northbridge/amd/agesa/family15 # CPU side of HT root complex - end #pci_domain + end #domain end #northbridge/amd/agesa/family15/root_complex diff --git a/src/mainboard/amd/inagua/devicetree.cb b/src/mainboard/amd/inagua/devicetree.cb index 100a5cccb5..b0d5fcb884 100644 --- a/src/mainboard/amd/inagua/devicetree.cb +++ b/src/mainboard/amd/inagua/devicetree.cb @@ -22,7 +22,7 @@ chip northbridge/amd/agesa/family14/root_complex device lapic 0 on end end end - device pci_domain 0 on + device domain 0 on subsystemid 0x1022 0x1510 inherit chip northbridge/amd/agesa/family14 # CPU side of HT root complex # device pci 18.0 on # northbridge @@ -88,6 +88,6 @@ chip northbridge/amd/agesa/family14/root_complex device pci 18.6 on end device pci 18.7 on end end #chip northbridge/amd/agesa/family14 # CPU side of HT root complex - end #pci_domain + end #domain end #northbridge/amd/agesa/family14/root_complex diff --git a/src/mainboard/amd/mahogany/devicetree.cb b/src/mainboard/amd/mahogany/devicetree.cb index d60d5a1f40..11f4b3c582 100644 --- a/src/mainboard/amd/mahogany/devicetree.cb +++ b/src/mainboard/amd/mahogany/devicetree.cb @@ -14,7 +14,7 @@ chip northbridge/amd/amdk8/root_complex device lapic 0 on end end end - device pci_domain 0 on + device domain 0 on subsystemid 0x1022 0x3060 inherit chip northbridge/amd/amdk8 device pci 18.0 on # southbridge @@ -117,5 +117,5 @@ chip northbridge/amd/amdk8/root_complex device pci 18.2 on end device pci 18.3 on end end #northbridge/amd/amdk8 - end #pci_domain + end #domain end #northbridge/amd/amdk8/root_complex diff --git a/src/mainboard/amd/mahogany_fam10/devicetree.cb b/src/mainboard/amd/mahogany_fam10/devicetree.cb index c51e53e7c9..c5cbb1cdd1 100644 --- a/src/mainboard/amd/mahogany_fam10/devicetree.cb +++ b/src/mainboard/amd/mahogany_fam10/devicetree.cb @@ -5,7 +5,7 @@ chip northbridge/amd/amdfam10/root_complex device lapic 0 on end end end - device pci_domain 0 on + device domain 0 on subsystemid 0x1022 0x3060 inherit chip northbridge/amd/amdfam10 device pci 18.0 on # northbridge @@ -110,9 +110,9 @@ chip northbridge/amd/amdfam10/root_complex device pci 18.4 on end # device pci 00.5 on end end - end #pci_domain + end #domain #for node 32 to node 63 -# device pci_domain 0 on +# device domain 0 on # chip northbridge/amd/amdfam10 # device pci 00.0 on end# northbridge # device pci 00.0 on end @@ -124,7 +124,7 @@ chip northbridge/amd/amdfam10/root_complex # device pci 00.4 on end # device pci 00.5 on end # end -# end #pci_domain +# end #domain # chip drivers/generic/debug # device pnp 0.0 off end # chip name diff --git a/src/mainboard/amd/norwich/devicetree.cb b/src/mainboard/amd/norwich/devicetree.cb index b2ede77ed1..6a0299bffe 100644 --- a/src/mainboard/amd/norwich/devicetree.cb +++ b/src/mainboard/amd/norwich/devicetree.cb @@ -1,5 +1,5 @@ chip northbridge/amd/lx - device pci_domain 0 on + device domain 0 on device pci 1.0 on end # Northbridge device pci 1.1 on end # Graphics chip southbridge/amd/cs5536 diff --git a/src/mainboard/amd/parmer/devicetree.cb b/src/mainboard/amd/parmer/devicetree.cb index 9dbdc98824..9942ffe8dc 100644 --- a/src/mainboard/amd/parmer/devicetree.cb +++ b/src/mainboard/amd/parmer/devicetree.cb @@ -24,7 +24,7 @@ chip northbridge/amd/agesa/family15tn/root_complex end end - device pci_domain 0 on + device domain 0 on subsystemid 0x1022 0x1410 inherit chip northbridge/amd/agesa/family15tn # CPU side of HT root complex @@ -86,5 +86,5 @@ chip northbridge/amd/agesa/family15tn/root_complex }" end #chip northbridge/amd/agesa/family15tn # CPU side of HT root complex - end #pci_domain + end #domain end #chip northbridge/amd/agesa/family15tn/root_complex diff --git a/src/mainboard/amd/persimmon/devicetree.cb b/src/mainboard/amd/persimmon/devicetree.cb index 12cb62f887..1eab2f53da 100644 --- a/src/mainboard/amd/persimmon/devicetree.cb +++ b/src/mainboard/amd/persimmon/devicetree.cb @@ -22,7 +22,7 @@ chip northbridge/amd/agesa/family14/root_complex device lapic 0 on end end end - device pci_domain 0 on + device domain 0 on subsystemid 0x1022 0x1510 inherit chip northbridge/amd/agesa/family14 # CPU side of HT root complex # device pci 18.0 on # northbridge @@ -152,5 +152,5 @@ chip northbridge/amd/agesa/family14/root_complex device pci 18.6 on end device pci 18.7 on end end #chip northbridge/amd/agesa/family14 # CPU side of HT root complex - end #pci_domain + end #domain end #northbridge/amd/agesa/family14/root_complex diff --git a/src/mainboard/amd/pistachio/devicetree.cb b/src/mainboard/amd/pistachio/devicetree.cb index 6608fddebf..4f16ea7e46 100644 --- a/src/mainboard/amd/pistachio/devicetree.cb +++ b/src/mainboard/amd/pistachio/devicetree.cb @@ -14,7 +14,7 @@ chip northbridge/amd/amdk8/root_complex device lapic 0 on end end end - device pci_domain 0 on + device domain 0 on subsystemid 0x1022 0x3050 inherit chip northbridge/amd/amdk8 device pci 18.0 on # southbridge, K8 HT Configuration @@ -76,6 +76,6 @@ chip northbridge/amd/amdk8/root_complex device pci 18.2 on end # K8 DRAM Controller and HT Trace Mode device pci 18.3 on end # K8 Miscellaneous Control end #northbridge/amd/amdk8 - end #pci_domain + end #domain end #northbridge/amd/amdk8/root_complex diff --git a/src/mainboard/amd/rumba/devicetree.cb b/src/mainboard/amd/rumba/devicetree.cb index e55f5c77b9..db51f654d4 100644 --- a/src/mainboard/amd/rumba/devicetree.cb +++ b/src/mainboard/amd/rumba/devicetree.cb @@ -4,7 +4,7 @@ chip northbridge/amd/gx2 device lapic 0 on end end end - device pci_domain 0 on + device domain 0 on device pci 1.0 on end device pci 1.1 on end chip southbridge/amd/cs5536 diff --git a/src/mainboard/amd/serengeti_cheetah/devicetree.cb b/src/mainboard/amd/serengeti_cheetah/devicetree.cb index b819292d5d..ac0e00e772 100644 --- a/src/mainboard/amd/serengeti_cheetah/devicetree.cb +++ b/src/mainboard/amd/serengeti_cheetah/devicetree.cb @@ -4,7 +4,7 @@ chip northbridge/amd/amdk8/root_complex device lapic 0 on end end end - device pci_domain 0 on + device domain 0 on subsystemid 0x1022 0x2b80 inherit chip northbridge/amd/amdk8 device pci 18.0 on # northbridge @@ -143,7 +143,7 @@ chip northbridge/amd/amdk8/root_complex end - end #pci_domain + end #domain # chip drivers/generic/debug # device pnp 0.0 off end # chip name # device pnp 0.1 on end # pci_regs_all diff --git a/src/mainboard/amd/serengeti_cheetah_fam10/devicetree.cb b/src/mainboard/amd/serengeti_cheetah_fam10/devicetree.cb index bfbb2b309a..40805c6d0e 100644 --- a/src/mainboard/amd/serengeti_cheetah_fam10/devicetree.cb +++ b/src/mainboard/amd/serengeti_cheetah_fam10/devicetree.cb @@ -4,7 +4,7 @@ chip northbridge/amd/amdfam10/root_complex device lapic 0 on end end end - device pci_domain 0 on + device domain 0 on subsystemid 0x1022 0x2b80 inherit chip northbridge/amd/amdfam10 device pci 18.0 on # northbridge @@ -118,9 +118,9 @@ chip northbridge/amd/amdfam10/root_complex device pci 18.4 on end # device pci 00.5 on end end - end #pci_domain + end #domain #for node 32 to node 63 -# device pci_domain 0 on +# device domain 0 on # chip northbridge/amd/amdfam10 # device pci 00.0 on end# northbridge # device pci 00.0 on end @@ -132,7 +132,7 @@ chip northbridge/amd/amdfam10/root_complex # device pci 00.4 on end # device pci 00.5 on end # end -# end #pci_domain +# end #domain # chip drivers/generic/debug # device pnp 0.0 off end # chip name diff --git a/src/mainboard/amd/south_station/devicetree.cb b/src/mainboard/amd/south_station/devicetree.cb index f0b471a92d..be6f52e62b 100644 --- a/src/mainboard/amd/south_station/devicetree.cb +++ b/src/mainboard/amd/south_station/devicetree.cb @@ -22,7 +22,7 @@ chip northbridge/amd/agesa/family14/root_complex device lapic 0 on end end end - device pci_domain 0 on + device domain 0 on subsystemid 0x1022 0x1510 inherit chip northbridge/amd/agesa/family14 # CPU side of HT root complex # device pci 18.0 on # northbridge @@ -100,6 +100,6 @@ chip northbridge/amd/agesa/family14/root_complex device pci 18.4 on end device pci 18.5 on end end #chip northbridge/amd/agesa/family14 # CPU side of HT root complex - end #pci_domain + end #domain end #northbridge/amd/agesa/family14/root_complex diff --git a/src/mainboard/amd/thatcher/devicetree.cb b/src/mainboard/amd/thatcher/devicetree.cb index ccb8b58212..e468ccedb0 100644 --- a/src/mainboard/amd/thatcher/devicetree.cb +++ b/src/mainboard/amd/thatcher/devicetree.cb @@ -24,7 +24,7 @@ chip northbridge/amd/agesa/family15tn/root_complex end end - device pci_domain 0 on + device domain 0 on subsystemid 0x1022 0x1410 inherit chip northbridge/amd/agesa/family15tn # CPU side of HT root complex @@ -101,5 +101,5 @@ chip northbridge/amd/agesa/family15tn/root_complex }" end #chip northbridge/amd/agesa/family15tn # CPU side of HT root complex - end #pci_domain + end #domain end #chip northbridge/amd/agesa/family15tn/root_complex diff --git a/src/mainboard/amd/tilapia_fam10/devicetree.cb b/src/mainboard/amd/tilapia_fam10/devicetree.cb index aeb582a678..ae25336b72 100644 --- a/src/mainboard/amd/tilapia_fam10/devicetree.cb +++ b/src/mainboard/amd/tilapia_fam10/devicetree.cb @@ -5,7 +5,7 @@ chip northbridge/amd/amdfam10/root_complex device lapic 0 on end end end - device pci_domain 0 on + device domain 0 on subsystemid 0x1022 0x3060 inherit chip northbridge/amd/amdfam10 device pci 18.0 on # northbridge @@ -111,9 +111,9 @@ chip northbridge/amd/amdfam10/root_complex device pci 18.4 on end # device pci 00.5 on end end - end #pci_domain + end #domain #for node 32 to node 63 -# device pci_domain 0 on +# device domain 0 on # chip northbridge/amd/amdfam10 # device pci 00.0 on end# northbridge # device pci 00.0 on end @@ -125,7 +125,7 @@ chip northbridge/amd/amdfam10/root_complex # device pci 00.4 on end # device pci 00.5 on end # end -# end #pci_domain +# end #domain # chip drivers/generic/debug # device pnp 0.0 off end # chip name diff --git a/src/mainboard/amd/torpedo/devicetree.cb b/src/mainboard/amd/torpedo/devicetree.cb index 2b6d896b4d..bd4f49b0f2 100755 --- a/src/mainboard/amd/torpedo/devicetree.cb +++ b/src/mainboard/amd/torpedo/devicetree.cb @@ -22,7 +22,7 @@ chip northbridge/amd/agesa/family12/root_complex device lapic 0 on end end end - device pci_domain 0 on + device domain 0 on subsystemid 0x1022 0x1705 inherit chip northbridge/amd/agesa/family12 # CPU side of HT root complex chip northbridge/amd/agesa/family12 # PCI side of HT root complex @@ -85,6 +85,6 @@ chip northbridge/amd/agesa/family12/root_complex device pci 18.6 on end device pci 18.7 on end end #chip northbridge/amd/agesa/family12 # CPU side of HT root complex - end #pci_domain + end #domain end #northbridge/amd/agesa/family12/root_complex diff --git a/src/mainboard/amd/union_station/devicetree.cb b/src/mainboard/amd/union_station/devicetree.cb index 857bc0283c..4f08cfb054 100644 --- a/src/mainboard/amd/union_station/devicetree.cb +++ b/src/mainboard/amd/union_station/devicetree.cb @@ -22,7 +22,7 @@ chip northbridge/amd/agesa/family14/root_complex device lapic 0 on end end end - device pci_domain 0 on + device domain 0 on subsystemid 0x1022 0x1510 inherit chip northbridge/amd/agesa/family14 # CPU side of HT root complex # device pci 18.0 on # northbridge @@ -76,6 +76,6 @@ chip northbridge/amd/agesa/family14/root_complex device pci 18.4 on end device pci 18.5 on end end #chip northbridge/amd/agesa/family14 # CPU side of HT root complex - end #pci_domain + end #domain end #northbridge/amd/agesa/family14/root_complex diff --git a/src/mainboard/aopen/dxplplusu/devicetree.cb b/src/mainboard/aopen/dxplplusu/devicetree.cb index 94a38d7f45..54614622b2 100644 --- a/src/mainboard/aopen/dxplplusu/devicetree.cb +++ b/src/mainboard/aopen/dxplplusu/devicetree.cb @@ -28,7 +28,7 @@ chip northbridge/intel/e7505 end end - device pci_domain 0 on + device domain 0 on device pci 0.0 on end # Chipset host controller device pci 0.1 on end # Host RASUM controller device pci 2.0 on # Hub interface B @@ -86,5 +86,5 @@ chip northbridge/intel/e7505 device pci 1f.5 on end # AC97 Audio device pci 1f.6 off end # AC97 Modem end # SB - end # PCI_DOMAIN + end # PCI domain end diff --git a/src/mainboard/arima/hdama/devicetree.cb b/src/mainboard/arima/hdama/devicetree.cb index d7252e226e..fbf29c5661 100644 --- a/src/mainboard/arima/hdama/devicetree.cb +++ b/src/mainboard/arima/hdama/devicetree.cb @@ -4,7 +4,7 @@ chip northbridge/amd/amdk8/root_complex device lapic 0 on end end end - device pci_domain 0 on + device domain 0 on subsystemid 0x161f 0x3016 inherit chip northbridge/amd/amdk8 device pci 18.0 on # northbridge diff --git a/src/mainboard/artecgroup/dbe61/devicetree.cb b/src/mainboard/artecgroup/dbe61/devicetree.cb index c8110d16c1..2f1f80233e 100644 --- a/src/mainboard/artecgroup/dbe61/devicetree.cb +++ b/src/mainboard/artecgroup/dbe61/devicetree.cb @@ -1,5 +1,5 @@ chip northbridge/amd/lx - device pci_domain 0 on + device domain 0 on device pci 1.0 on end # Northbridge device pci 1.1 on end # Graphics chip southbridge/amd/cs5536 diff --git a/src/mainboard/asi/mb_5blgp/devicetree.cb b/src/mainboard/asi/mb_5blgp/devicetree.cb index 3ad1acb617..d84bf0e045 100644 --- a/src/mainboard/asi/mb_5blgp/devicetree.cb +++ b/src/mainboard/asi/mb_5blgp/devicetree.cb @@ -1,5 +1,5 @@ chip northbridge/amd/gx1 # Northbridge - device pci_domain 0 on # PCI domain + device domain 0 on # PCI domain device pci 0.0 on end # Host bridge chip southbridge/amd/cs5530 # Southbridge device pci 0f.0 on end # Ethernet diff --git a/src/mainboard/asi/mb_5blmp/devicetree.cb b/src/mainboard/asi/mb_5blmp/devicetree.cb index e3e0d95710..e8e6ac3ca5 100644 --- a/src/mainboard/asi/mb_5blmp/devicetree.cb +++ b/src/mainboard/asi/mb_5blmp/devicetree.cb @@ -1,5 +1,5 @@ chip northbridge/amd/gx1 # Northbridge - device pci_domain 0 on + device domain 0 on device pci 0.0 on end # Host bridge chip southbridge/amd/cs5530 # Southbridge device pci 0f.0 off end # Ethernet (Realtek RTL8139B) diff --git a/src/mainboard/asrock/939a785gmh/devicetree.cb b/src/mainboard/asrock/939a785gmh/devicetree.cb index 1dc92a3312..5f81d83000 100644 --- a/src/mainboard/asrock/939a785gmh/devicetree.cb +++ b/src/mainboard/asrock/939a785gmh/devicetree.cb @@ -15,7 +15,7 @@ chip northbridge/amd/amdk8/root_complex device lapic 0 on end end end - device pci_domain 0 on + device domain 0 on subsystemid 0x1022 0x3060 inherit chip northbridge/amd/amdk8 device pci 18.0 on # southbridge @@ -127,6 +127,6 @@ chip northbridge/amd/amdk8/root_complex device pci 18.2 on end device pci 18.3 on end end #northbridge/amd/amdk8 - end #pci_domain + end #domain end #northbridge/amd/amdk8/root_complex diff --git a/src/mainboard/asrock/e350m1/devicetree.cb b/src/mainboard/asrock/e350m1/devicetree.cb index a4bdc65fdc..1fed8ac7f7 100644 --- a/src/mainboard/asrock/e350m1/devicetree.cb +++ b/src/mainboard/asrock/e350m1/devicetree.cb @@ -22,7 +22,7 @@ chip northbridge/amd/agesa/family14/root_complex device lapic 0 on end end end - device pci_domain 0 on + device domain 0 on subsystemid 0x1022 0x1510 inherit chip northbridge/amd/agesa/family14 # CPU side of HT root complex # device pci 18.0 on # northbridge @@ -128,6 +128,6 @@ chip northbridge/amd/agesa/family14/root_complex device pci 18.6 on end device pci 18.7 on end end #chip northbridge/amd/agesa/family14 # CPU side of HT root complex - end #pci_domain + end #domain end #northbridge/amd/agesa/family14/root_complex diff --git a/src/mainboard/asus/a8n_e/devicetree.cb b/src/mainboard/asus/a8n_e/devicetree.cb index 86bf3aa2e8..dbb27dc51a 100644 --- a/src/mainboard/asus/a8n_e/devicetree.cb +++ b/src/mainboard/asus/a8n_e/devicetree.cb @@ -5,7 +5,7 @@ chip northbridge/amd/amdk8/root_complex # Root complex end end - device pci_domain 0 on # PCI domain + device domain 0 on # PCI domain subsystemid 0x1043 0x815a inherit chip northbridge/amd/amdk8 # Northbridge / RAM controller device pci 18.0 on # Link 0 == LDT 0 diff --git a/src/mainboard/asus/a8v-e_deluxe/devicetree.cb b/src/mainboard/asus/a8v-e_deluxe/devicetree.cb index 31df8fa3c1..b77601dd53 100644 --- a/src/mainboard/asus/a8v-e_deluxe/devicetree.cb +++ b/src/mainboard/asus/a8v-e_deluxe/devicetree.cb @@ -4,7 +4,7 @@ chip northbridge/amd/amdk8/root_complex # Root complex device lapic 0 on end # APIC end end - device pci_domain 0 on # PCI domain + device domain 0 on # PCI domain subsystemid 1043 0 inherit chip northbridge/amd/amdk8 # mc0 device pci 18.0 on # Northbridge diff --git a/src/mainboard/asus/a8v-e_se/devicetree.cb b/src/mainboard/asus/a8v-e_se/devicetree.cb index 3da93fedf7..5ace9ea416 100644 --- a/src/mainboard/asus/a8v-e_se/devicetree.cb +++ b/src/mainboard/asus/a8v-e_se/devicetree.cb @@ -4,7 +4,7 @@ chip northbridge/amd/amdk8/root_complex # Root complex device lapic 0 on end # APIC end end - device pci_domain 0 on # PCI domain + device domain 0 on # PCI domain subsystemid 0x1043 0 inherit chip northbridge/amd/amdk8 # mc0 device pci 18.0 on # Northbridge diff --git a/src/mainboard/asus/dsbf/devicetree.cb b/src/mainboard/asus/dsbf/devicetree.cb index b18fdaf302..958ab93523 100644 --- a/src/mainboard/asus/dsbf/devicetree.cb +++ b/src/mainboard/asus/dsbf/devicetree.cb @@ -28,7 +28,7 @@ chip northbridge/intel/i5000 end end - device pci_domain 0 on + device domain 0 on device pci 00.0 on # Host bridge subsystemid 0x1043 0x81db end diff --git a/src/mainboard/asus/k8v-x/devicetree.cb b/src/mainboard/asus/k8v-x/devicetree.cb index 61c5a2dfcf..74c96bad1d 100644 --- a/src/mainboard/asus/k8v-x/devicetree.cb +++ b/src/mainboard/asus/k8v-x/devicetree.cb @@ -4,7 +4,7 @@ chip northbridge/amd/amdk8/root_complex # Root complex device lapic 0 on end # APIC end end - device pci_domain 0 on # PCI domain + device domain 0 on # PCI domain subsystemid 0x1043 0 inherit chip northbridge/amd/amdk8 # mc0 device pci 18.0 on # Northbridge diff --git a/src/mainboard/asus/m2n-e/devicetree.cb b/src/mainboard/asus/m2n-e/devicetree.cb index bf4de2585a..2d920177a4 100644 --- a/src/mainboard/asus/m2n-e/devicetree.cb +++ b/src/mainboard/asus/m2n-e/devicetree.cb @@ -24,7 +24,7 @@ chip northbridge/amd/amdk8/root_complex # Root complex device lapic 0 on end # Local APIC of the CPU end end - device pci_domain 0 on # PCI domain + device domain 0 on # PCI domain subsystemid 0x1043 0x8239 inherit chip northbridge/amd/amdk8 # Northbridge / RAM controller device pci 18.0 on # Link 0 == LDT 0 diff --git a/src/mainboard/asus/m2v-mx_se/devicetree.cb b/src/mainboard/asus/m2v-mx_se/devicetree.cb index 7e4c6d1079..d3b5c1b505 100644 --- a/src/mainboard/asus/m2v-mx_se/devicetree.cb +++ b/src/mainboard/asus/m2v-mx_se/devicetree.cb @@ -4,7 +4,7 @@ chip northbridge/amd/amdk8/root_complex # Root complex device lapic 0 on end # APIC end end - device pci_domain 0 on # PCI domain + device domain 0 on # PCI domain subsystemid 0x1043 0 inherit chip northbridge/amd/amdk8 # mc0 device pci 18.0 on # Northbridge diff --git a/src/mainboard/asus/m2v/devicetree.cb b/src/mainboard/asus/m2v/devicetree.cb index 376dbf1d9c..3e52394cbe 100644 --- a/src/mainboard/asus/m2v/devicetree.cb +++ b/src/mainboard/asus/m2v/devicetree.cb @@ -4,7 +4,7 @@ chip northbridge/amd/amdk8/root_complex # Root complex device lapic 0 on end # APIC end end - device pci_domain 0 on # PCI domain + device domain 0 on # PCI domain subsystemid 0x1043 0 inherit chip northbridge/amd/amdk8 # mc0 device pci 18.0 on # Northbridge diff --git a/src/mainboard/asus/m4a78-em/devicetree.cb b/src/mainboard/asus/m4a78-em/devicetree.cb index c463d71740..bbf4b3d76c 100644 --- a/src/mainboard/asus/m4a78-em/devicetree.cb +++ b/src/mainboard/asus/m4a78-em/devicetree.cb @@ -4,7 +4,7 @@ chip northbridge/amd/amdfam10/root_complex device lapic 0 on end end end - device pci_domain 0 on + device domain 0 on subsystemid 0x1043 0x83f1 inherit chip northbridge/amd/amdfam10 device pci 18.0 on # northbridge @@ -102,5 +102,5 @@ chip northbridge/amd/amdfam10/root_complex device pci 18.3 on end device pci 18.4 on end end # chip northbridge - end #pci_domain + end #domain end # northbridge/amd/amdfam10/root_complex diff --git a/src/mainboard/asus/m4a785-m/devicetree.cb b/src/mainboard/asus/m4a785-m/devicetree.cb index e8764b1eba..e6bd174f6c 100644 --- a/src/mainboard/asus/m4a785-m/devicetree.cb +++ b/src/mainboard/asus/m4a785-m/devicetree.cb @@ -4,7 +4,7 @@ chip northbridge/amd/amdfam10/root_complex device lapic 0 on end end end - device pci_domain 0 on + device domain 0 on subsystemid 0x1043 0x83a2 inherit chip northbridge/amd/amdfam10 device pci 18.0 on # northbridge @@ -102,5 +102,5 @@ chip northbridge/amd/amdfam10/root_complex device pci 18.3 on end device pci 18.4 on end end # chip northbridge - end #pci_domain + end #domain end # northbridge/amd/amdfam10/root_complex diff --git a/src/mainboard/asus/m4a785t-m/devicetree.cb b/src/mainboard/asus/m4a785t-m/devicetree.cb index 0299fc2587..2817b63a8a 100644 --- a/src/mainboard/asus/m4a785t-m/devicetree.cb +++ b/src/mainboard/asus/m4a785t-m/devicetree.cb @@ -4,7 +4,7 @@ chip northbridge/amd/amdfam10/root_complex device lapic 0 on end end end - device pci_domain 0 on + device domain 0 on subsystemid 0x1043 0x83a2 inherit chip northbridge/amd/amdfam10 device pci 18.0 on # northbridge @@ -104,5 +104,5 @@ chip northbridge/amd/amdfam10/root_complex device pci 18.3 on end device pci 18.4 on end end # chip northbridge - end #pci_domain + end #domain end # northbridge/amd/amdfam10/root_complex diff --git a/src/mainboard/asus/m5a88-v/devicetree.cb b/src/mainboard/asus/m5a88-v/devicetree.cb index 5270c28b9a..1590b9fe4c 100644 --- a/src/mainboard/asus/m5a88-v/devicetree.cb +++ b/src/mainboard/asus/m5a88-v/devicetree.cb @@ -5,7 +5,7 @@ chip northbridge/amd/amdfam10/root_complex device lapic 0 on end end end - device pci_domain 0 on + device domain 0 on subsystemid 0x1043 0x843e inherit #TODO: Set the correctly subsystem id. chip northbridge/amd/amdfam10 device pci 18.0 on # northbridge @@ -120,5 +120,5 @@ chip northbridge/amd/amdfam10/root_complex device pci 18.3 on end device pci 18.4 on end end - end #pci_domain + end #domain end diff --git a/src/mainboard/asus/mew-am/devicetree.cb b/src/mainboard/asus/mew-am/devicetree.cb index a4b80e1bb4..cf04dc1617 100644 --- a/src/mainboard/asus/mew-am/devicetree.cb +++ b/src/mainboard/asus/mew-am/devicetree.cb @@ -4,7 +4,7 @@ chip northbridge/intel/i82810 # Northbridge device lapic 0 on end # APIC end end - device pci_domain 0 on # PCI domain + device domain 0 on # PCI domain device pci 0.0 on end # Graphics Memory Controller Hub (GMCH) device pci 1.0 on end # Chipset Graphics Controller (CGC) chip southbridge/intel/i82801ax # Southbridge diff --git a/src/mainboard/asus/mew-vm/devicetree.cb b/src/mainboard/asus/mew-vm/devicetree.cb index 29d706c62a..e0cc9e39eb 100644 --- a/src/mainboard/asus/mew-vm/devicetree.cb +++ b/src/mainboard/asus/mew-vm/devicetree.cb @@ -1,5 +1,5 @@ chip northbridge/intel/i82810 - device pci_domain 0 on + device domain 0 on device pci 0.0 on end # Host bridge device pci 1.0 on # Onboard Video # device pci 1.0 on end diff --git a/src/mainboard/asus/p2b-d/devicetree.cb b/src/mainboard/asus/p2b-d/devicetree.cb index 64219b76fc..fb50362ecb 100644 --- a/src/mainboard/asus/p2b-d/devicetree.cb +++ b/src/mainboard/asus/p2b-d/devicetree.cb @@ -7,7 +7,7 @@ chip northbridge/intel/i440bx # Northbridge device lapic 1 on end # Local APIC of CPU 1 end end - device pci_domain 0 on # PCI domain + device domain 0 on # PCI domain device pci 0.0 on end # Host bridge device pci 1.0 on end # PCI/AGP bridge chip southbridge/intel/i82371eb # Southbridge diff --git a/src/mainboard/asus/p2b-ds/devicetree.cb b/src/mainboard/asus/p2b-ds/devicetree.cb index 8a00f57f74..b7310dd1f3 100644 --- a/src/mainboard/asus/p2b-ds/devicetree.cb +++ b/src/mainboard/asus/p2b-ds/devicetree.cb @@ -7,7 +7,7 @@ chip northbridge/intel/i440bx # Northbridge device lapic 1 on end # Local APIC of CPU 1 end end - device pci_domain 0 on # PCI domain + device domain 0 on # PCI domain device pci 0.0 on end # Host bridge device pci 1.0 on end # PCI/AGP bridge chip southbridge/intel/i82371eb # Southbridge diff --git a/src/mainboard/asus/p2b-f/devicetree.cb b/src/mainboard/asus/p2b-f/devicetree.cb index 6fae008c61..f88a8f896a 100644 --- a/src/mainboard/asus/p2b-f/devicetree.cb +++ b/src/mainboard/asus/p2b-f/devicetree.cb @@ -4,7 +4,7 @@ chip northbridge/intel/i440bx # Northbridge device lapic 0 on end # APIC end end - device pci_domain 0 on # PCI domain + device domain 0 on # PCI domain device pci 0.0 on end # Host bridge device pci 1.0 on end # PCI/AGP bridge chip southbridge/intel/i82371eb # Southbridge diff --git a/src/mainboard/asus/p2b-ls/devicetree.cb b/src/mainboard/asus/p2b-ls/devicetree.cb index cc8281b2c6..39f4246b0e 100644 --- a/src/mainboard/asus/p2b-ls/devicetree.cb +++ b/src/mainboard/asus/p2b-ls/devicetree.cb @@ -4,7 +4,7 @@ chip northbridge/intel/i440bx # Northbridge device lapic 0 on end # APIC end end - device pci_domain 0 on # PCI domain + device domain 0 on # PCI domain device pci 0.0 on end # Host bridge device pci 1.0 on end # PCI/AGP bridge chip southbridge/intel/i82371eb # Southbridge diff --git a/src/mainboard/asus/p2b/devicetree.cb b/src/mainboard/asus/p2b/devicetree.cb index f4bfbad87c..0feb7e45cb 100644 --- a/src/mainboard/asus/p2b/devicetree.cb +++ b/src/mainboard/asus/p2b/devicetree.cb @@ -4,7 +4,7 @@ chip northbridge/intel/i440bx # Northbridge device lapic 0 on end # APIC end end - device pci_domain 0 on # PCI domain + device domain 0 on # PCI domain device pci 0.0 on end # Host bridge device pci 1.0 on end # PCI/AGP bridge chip southbridge/intel/i82371eb # Southbridge diff --git a/src/mainboard/asus/p3b-f/devicetree.cb b/src/mainboard/asus/p3b-f/devicetree.cb index 6fae008c61..f88a8f896a 100644 --- a/src/mainboard/asus/p3b-f/devicetree.cb +++ b/src/mainboard/asus/p3b-f/devicetree.cb @@ -4,7 +4,7 @@ chip northbridge/intel/i440bx # Northbridge device lapic 0 on end # APIC end end - device pci_domain 0 on # PCI domain + device domain 0 on # PCI domain device pci 0.0 on end # Host bridge device pci 1.0 on end # PCI/AGP bridge chip southbridge/intel/i82371eb # Southbridge diff --git a/src/mainboard/avalue/eax-785e/devicetree.cb b/src/mainboard/avalue/eax-785e/devicetree.cb index bf58f9099a..a2ac9f4c8d 100644 --- a/src/mainboard/avalue/eax-785e/devicetree.cb +++ b/src/mainboard/avalue/eax-785e/devicetree.cb @@ -5,7 +5,7 @@ chip northbridge/amd/amdfam10/root_complex device lapic 0 on end end end - device pci_domain 0 on + device domain 0 on subsystemid 0x1612 0x3060 inherit #TODO: Set the correctly subsystem id. chip northbridge/amd/amdfam10 device pci 18.0 on # northbridge @@ -107,5 +107,5 @@ chip northbridge/amd/amdfam10/root_complex device pci 18.3 on end device pci 18.4 on end end - end #pci_domain + end #domain end diff --git a/src/mainboard/axus/tc320/devicetree.cb b/src/mainboard/axus/tc320/devicetree.cb index 3c17690d21..970f71fb13 100644 --- a/src/mainboard/axus/tc320/devicetree.cb +++ b/src/mainboard/axus/tc320/devicetree.cb @@ -1,5 +1,5 @@ chip northbridge/amd/gx1 # Northbridge - device pci_domain 0 on # PCI domain + device domain 0 on # PCI domain device pci 0.0 on end # Host bridge chip southbridge/amd/cs5530 # Southbridge device pci 12.0 on # ISA bridge diff --git a/src/mainboard/azza/pt-6ibd/devicetree.cb b/src/mainboard/azza/pt-6ibd/devicetree.cb index 2448601c6b..ce51b040b3 100644 --- a/src/mainboard/azza/pt-6ibd/devicetree.cb +++ b/src/mainboard/azza/pt-6ibd/devicetree.cb @@ -4,7 +4,7 @@ chip northbridge/intel/i440bx # Northbridge device lapic 0 on end # APIC end end - device pci_domain 0 on # PCI domain + device domain 0 on # PCI domain device pci 0.0 on end # Host bridge device pci 1.0 on end # PCI/AGP bridge chip southbridge/intel/i82371eb # Southbridge diff --git a/src/mainboard/bachmann/ot200/devicetree.cb b/src/mainboard/bachmann/ot200/devicetree.cb index 4a065cbd35..a49f267e51 100644 --- a/src/mainboard/bachmann/ot200/devicetree.cb +++ b/src/mainboard/bachmann/ot200/devicetree.cb @@ -1,5 +1,5 @@ chip northbridge/amd/lx - device pci_domain 0 on + device domain 0 on device pci 1.0 on end # Northbridge device pci 1.1 on end # Graphics device pci 1.2 on end # AES diff --git a/src/mainboard/bcom/winnet100/devicetree.cb b/src/mainboard/bcom/winnet100/devicetree.cb index 20c117e70e..61a71e6210 100644 --- a/src/mainboard/bcom/winnet100/devicetree.cb +++ b/src/mainboard/bcom/winnet100/devicetree.cb @@ -1,5 +1,5 @@ chip northbridge/amd/gx1 # Northbridge - device pci_domain 0 on # PCI domain + device domain 0 on # PCI domain device pci 0.0 on end # Host bridge chip southbridge/amd/cs5530 # Southbridge device pci 0f.0 on end # Ethernet (onboard) diff --git a/src/mainboard/bcom/winnetp680/devicetree.cb b/src/mainboard/bcom/winnetp680/devicetree.cb index 3e31223e5c..c324872dde 100644 --- a/src/mainboard/bcom/winnetp680/devicetree.cb +++ b/src/mainboard/bcom/winnetp680/devicetree.cb @@ -1,5 +1,5 @@ chip northbridge/via/cn700 # Northbridge - device pci_domain 0 on # PCI domain + device domain 0 on # PCI domain device pci 0.0 on end # AGP Bridge device pci 0.1 on end # Error Reporting device pci 0.2 on end # Host Bus Control diff --git a/src/mainboard/bifferos/bifferboard/devicetree.cb b/src/mainboard/bifferos/bifferboard/devicetree.cb index 757ddd52c9..09dde33517 100644 --- a/src/mainboard/bifferos/bifferboard/devicetree.cb +++ b/src/mainboard/bifferos/bifferboard/devicetree.cb @@ -1,5 +1,5 @@ chip northbridge/rdc/r8610 - device pci_domain 0 on + device domain 0 on device pci 0.0 on end chip southbridge/rdc/r8610 # Southbridge device pci 7.0 on end # SB diff --git a/src/mainboard/biostar/m6tba/devicetree.cb b/src/mainboard/biostar/m6tba/devicetree.cb index faeb73af2a..c92f8a6055 100644 --- a/src/mainboard/biostar/m6tba/devicetree.cb +++ b/src/mainboard/biostar/m6tba/devicetree.cb @@ -4,7 +4,7 @@ chip northbridge/intel/i440bx # Northbridge device lapic 0 on end # APIC end end - device pci_domain 0 on # PCI domain + device domain 0 on # PCI domain device pci 0.0 on end # Host bridge device pci 1.0 on end # PCI/AGP bridge chip southbridge/intel/i82371eb # Southbridge diff --git a/src/mainboard/broadcom/blast/devicetree.cb b/src/mainboard/broadcom/blast/devicetree.cb index 6779a7a152..5ad7cbf6c2 100644 --- a/src/mainboard/broadcom/blast/devicetree.cb +++ b/src/mainboard/broadcom/blast/devicetree.cb @@ -4,7 +4,7 @@ chip northbridge/amd/amdk8/root_complex device lapic 0 on end end end - device pci_domain 0 on + device domain 0 on subsystemid 0x161f 0x3050 inherit chip northbridge/amd/amdk8 device pci 18.0 on # northbridge @@ -118,7 +118,7 @@ chip northbridge/amd/amdk8/root_complex end - end #pci_domain + end #domain # chip drivers/generic/debug # device pnp 0.0 off end # chip name # device pnp 0.1 on end # pci_regs_all diff --git a/src/mainboard/compaq/deskpro_en_sff_p600/devicetree.cb b/src/mainboard/compaq/deskpro_en_sff_p600/devicetree.cb index a7451264a4..4ddedfa4a7 100644 --- a/src/mainboard/compaq/deskpro_en_sff_p600/devicetree.cb +++ b/src/mainboard/compaq/deskpro_en_sff_p600/devicetree.cb @@ -4,7 +4,7 @@ chip northbridge/intel/i440bx # Northbridge device lapic 0 on end # APIC end end - device pci_domain 0 on # PCI domain + device domain 0 on # PCI domain device pci 0.0 on end # Host bridge device pci 1.0 on end # PCI/AGP bridge device pci a.0 on end # NIC (onboard) diff --git a/src/mainboard/digitallogic/adl855pc/devicetree.cb b/src/mainboard/digitallogic/adl855pc/devicetree.cb index c514aca3b9..9eeb95f926 100644 --- a/src/mainboard/digitallogic/adl855pc/devicetree.cb +++ b/src/mainboard/digitallogic/adl855pc/devicetree.cb @@ -1,5 +1,5 @@ chip northbridge/intel/i855 - device pci_domain 0 on + device domain 0 on device pci 0.0 on end device pci 1.0 on end chip southbridge/intel/i82801dx diff --git a/src/mainboard/digitallogic/msm586seg/devicetree.cb b/src/mainboard/digitallogic/msm586seg/devicetree.cb index 9579b1166e..e43ebff946 100644 --- a/src/mainboard/digitallogic/msm586seg/devicetree.cb +++ b/src/mainboard/digitallogic/msm586seg/devicetree.cb @@ -1,5 +1,5 @@ chip cpu/amd/sc520 - device pci_domain 0 on + device domain 0 on device pci 0.0 on end device pci 12.0 on end # enet device pci 14.0 on end # 69000 diff --git a/src/mainboard/digitallogic/msm800sev/devicetree.cb b/src/mainboard/digitallogic/msm800sev/devicetree.cb index e00b36f99f..77dfbd0aad 100644 --- a/src/mainboard/digitallogic/msm800sev/devicetree.cb +++ b/src/mainboard/digitallogic/msm800sev/devicetree.cb @@ -1,5 +1,5 @@ chip northbridge/amd/lx - device pci_domain 0 on + device domain 0 on device pci 1.0 on end device pci 1.1 on end chip southbridge/amd/cs5536 diff --git a/src/mainboard/eaglelion/5bcm/devicetree.cb b/src/mainboard/eaglelion/5bcm/devicetree.cb index 94e8fab6c0..33f1f905d1 100644 --- a/src/mainboard/eaglelion/5bcm/devicetree.cb +++ b/src/mainboard/eaglelion/5bcm/devicetree.cb @@ -1,5 +1,5 @@ chip northbridge/amd/gx1 - device pci_domain 0 on + device domain 0 on device pci 0.0 on end chip southbridge/amd/cs5530 device pci 12.0 on diff --git a/src/mainboard/ecs/p6iwp-fe/devicetree.cb b/src/mainboard/ecs/p6iwp-fe/devicetree.cb index d2b8249873..180a2c98cb 100644 --- a/src/mainboard/ecs/p6iwp-fe/devicetree.cb +++ b/src/mainboard/ecs/p6iwp-fe/devicetree.cb @@ -24,7 +24,7 @@ chip northbridge/intel/i82810 # Northbridge device lapic 0 on end # APIC end end - device pci_domain 0 on # PCI domain + device domain 0 on # PCI domain device pci 0.0 on end # Graphics Memory Controller Hub (GMCH) device pci 1.0 on end # Chipset Graphics Controller (CGC) chip southbridge/intel/i82801ax # Southbridge diff --git a/src/mainboard/emulation/qemu-x86/devicetree.cb b/src/mainboard/emulation/qemu-x86/devicetree.cb index 50f4b11917..ed64eefc3d 100644 --- a/src/mainboard/emulation/qemu-x86/devicetree.cb +++ b/src/mainboard/emulation/qemu-x86/devicetree.cb @@ -1,5 +1,5 @@ chip mainboard/emulation/qemu-x86 - device pci_domain 0 on + device domain 0 on device pci 0.0 on end chip southbridge/intel/i82371eb # southbridge diff --git a/src/mainboard/emulation/qemu-x86/northbridge.c b/src/mainboard/emulation/qemu-x86/northbridge.c index 6d73585cf5..7c36c0a469 100644 --- a/src/mainboard/emulation/qemu-x86/northbridge.c +++ b/src/mainboard/emulation/qemu-x86/northbridge.c @@ -138,7 +138,7 @@ static struct device_operations pci_domain_ops = { static void enable_dev(struct device *dev) { /* Set the operations if it is a special bus type */ - if (dev->path.type == DEVICE_PATH_PCI_DOMAIN) { + if (dev->path.type == DEVICE_PATH_DOMAIN) { dev->ops = &pci_domain_ops; pci_set_method(dev); } diff --git a/src/mainboard/getac/p470/devicetree.cb b/src/mainboard/getac/p470/devicetree.cb index bdd959edde..10870a6a00 100644 --- a/src/mainboard/getac/p470/devicetree.cb +++ b/src/mainboard/getac/p470/devicetree.cb @@ -27,7 +27,7 @@ chip northbridge/intel/i945 end end - device pci_domain 0 on + device domain 0 on device pci 00.0 on end # host bridge # autodetect: #device pci 01.0 off end # i945 PCIe root port diff --git a/src/mainboard/gigabyte/ga-6bxc/devicetree.cb b/src/mainboard/gigabyte/ga-6bxc/devicetree.cb index b5a4b5a563..a258515f3d 100644 --- a/src/mainboard/gigabyte/ga-6bxc/devicetree.cb +++ b/src/mainboard/gigabyte/ga-6bxc/devicetree.cb @@ -4,7 +4,7 @@ chip northbridge/intel/i440bx # Northbridge device lapic 0 on end # APIC end end - device pci_domain 0 on # PCI domain + device domain 0 on # PCI domain device pci 0.0 on end # Host bridge device pci 1.0 on end # PCI/AGP bridge chip southbridge/intel/i82371eb # Southbridge diff --git a/src/mainboard/gigabyte/ga-6bxe/devicetree.cb b/src/mainboard/gigabyte/ga-6bxe/devicetree.cb index f84c7b38d8..0f3f201fd8 100644 --- a/src/mainboard/gigabyte/ga-6bxe/devicetree.cb +++ b/src/mainboard/gigabyte/ga-6bxe/devicetree.cb @@ -4,7 +4,7 @@ chip northbridge/intel/i440bx # Northbridge device lapic 0 on end # APIC end end - device pci_domain 0 on # PCI domain + device domain 0 on # PCI domain device pci 0.0 on end # Host bridge device pci 1.0 on end # PCI/AGP bridge chip southbridge/intel/i82371eb # Southbridge diff --git a/src/mainboard/gigabyte/ga_2761gxdk/devicetree.cb b/src/mainboard/gigabyte/ga_2761gxdk/devicetree.cb index e1aac4eb35..0bf93077df 100644 --- a/src/mainboard/gigabyte/ga_2761gxdk/devicetree.cb +++ b/src/mainboard/gigabyte/ga_2761gxdk/devicetree.cb @@ -4,7 +4,7 @@ chip northbridge/amd/amdk8/root_complex device lapic 0 on end end end - device pci_domain 0 on + device domain 0 on subsystemid 0x1039 0x1234 inherit chip northbridge/amd/amdk8 #mc0 device pci 18.0 on diff --git a/src/mainboard/gigabyte/m57sli/devicetree.cb b/src/mainboard/gigabyte/m57sli/devicetree.cb index 2184de5050..197f1cb8af 100644 --- a/src/mainboard/gigabyte/m57sli/devicetree.cb +++ b/src/mainboard/gigabyte/m57sli/devicetree.cb @@ -4,7 +4,7 @@ chip northbridge/amd/amdk8/root_complex # Root complex device lapic 0 on end # Local APIC of the CPU end end -device pci_domain 0 on # PCI domain +device domain 0 on # PCI domain subsystemid 0x1022 0x2b80 inherit chip northbridge/amd/amdk8 # Northbridge / RAM controller device pci 18.0 on # Link 0 == LDT 0 diff --git a/src/mainboard/gigabyte/ma785gm/devicetree.cb b/src/mainboard/gigabyte/ma785gm/devicetree.cb index 47add73465..49bfe2a48c 100644 --- a/src/mainboard/gigabyte/ma785gm/devicetree.cb +++ b/src/mainboard/gigabyte/ma785gm/devicetree.cb @@ -5,7 +5,7 @@ chip northbridge/amd/amdfam10/root_complex device lapic 0 on end end end - device pci_domain 0 on + device domain 0 on subsystemid 0x1022 0x3060 inherit chip northbridge/amd/amdfam10 device pci 18.0 on # northbridge @@ -110,6 +110,6 @@ chip northbridge/amd/amdfam10/root_complex device pci 18.3 on end device pci 18.4 on end end - end #pci_domain + end #domain #for node 32 to node 63 end diff --git a/src/mainboard/gigabyte/ma785gmt/devicetree.cb b/src/mainboard/gigabyte/ma785gmt/devicetree.cb index 124572f5e5..c7c0ae1399 100644 --- a/src/mainboard/gigabyte/ma785gmt/devicetree.cb +++ b/src/mainboard/gigabyte/ma785gmt/devicetree.cb @@ -5,7 +5,7 @@ chip northbridge/amd/amdfam10/root_complex device lapic 0 on end end end - device pci_domain 0 on + device domain 0 on subsystemid 0x1022 0x3060 inherit chip northbridge/amd/amdfam10 device pci 18.0 on # northbridge @@ -110,6 +110,6 @@ chip northbridge/amd/amdfam10/root_complex device pci 18.3 on end device pci 18.4 on end end - end #pci_domain + end #domain #for node 32 to node 63 end diff --git a/src/mainboard/gigabyte/ma78gm/devicetree.cb b/src/mainboard/gigabyte/ma78gm/devicetree.cb index 2fb4824c56..2fb0f1b87b 100644 --- a/src/mainboard/gigabyte/ma78gm/devicetree.cb +++ b/src/mainboard/gigabyte/ma78gm/devicetree.cb @@ -5,7 +5,7 @@ chip northbridge/amd/amdfam10/root_complex device lapic 0 on end end end - device pci_domain 0 on + device domain 0 on subsystemid 0x1022 0x3060 inherit chip northbridge/amd/amdfam10 device pci 18.0 on # northbridge @@ -110,6 +110,6 @@ chip northbridge/amd/amdfam10/root_complex device pci 18.4 on end # device pci 00.5 on end end - end #pci_domain + end #domain #for node 32 to node 63 end diff --git a/src/mainboard/google/butterfly/devicetree.cb b/src/mainboard/google/butterfly/devicetree.cb index d4e2ccdfa1..6ab0f6fb98 100644 --- a/src/mainboard/google/butterfly/devicetree.cb +++ b/src/mainboard/google/butterfly/devicetree.cb @@ -33,7 +33,7 @@ chip northbridge/intel/sandybridge end end - device pci_domain 0 on + device domain 0 on device pci 00.0 on end # host bridge device pci 01.0 off end # PCIe Bridge for discrete graphics device pci 02.0 on end # vga controller diff --git a/src/mainboard/google/parrot/devicetree.cb b/src/mainboard/google/parrot/devicetree.cb index d93c021326..0b18613b31 100644 --- a/src/mainboard/google/parrot/devicetree.cb +++ b/src/mainboard/google/parrot/devicetree.cb @@ -36,7 +36,7 @@ chip northbridge/intel/sandybridge end end - device pci_domain 0 on + device domain 0 on device pci 00.0 on end # host bridge device pci 02.0 on end # vga controller diff --git a/src/mainboard/hp/dl145_g1/devicetree.cb b/src/mainboard/hp/dl145_g1/devicetree.cb index 0f4a34fa48..7ad1505477 100644 --- a/src/mainboard/hp/dl145_g1/devicetree.cb +++ b/src/mainboard/hp/dl145_g1/devicetree.cb @@ -4,7 +4,7 @@ chip northbridge/amd/amdk8/root_complex device lapic 0 on end end end - device pci_domain 0 on + device domain 0 on subsystemid 0x1022 0x7460 inherit chip northbridge/amd/amdk8 device pci 18.0 on end # link 0 diff --git a/src/mainboard/hp/dl145_g3/devicetree.cb b/src/mainboard/hp/dl145_g3/devicetree.cb index 1f4f04226c..fee6dbd23b 100644 --- a/src/mainboard/hp/dl145_g3/devicetree.cb +++ b/src/mainboard/hp/dl145_g3/devicetree.cb @@ -4,7 +4,7 @@ chip northbridge/amd/amdk8/root_complex device lapic 0 on end end end - device pci_domain 0 on + device domain 0 on chip northbridge/amd/amdk8 # northbridge device pci 18.0 on # devices on link 0 chip southbridge/broadcom/bcm21000 # HT2100 @@ -81,7 +81,7 @@ chip northbridge/amd/amdk8/root_complex device pci 18.3 on end end # amdk8 - end #pci_domain + end #domain end diff --git a/src/mainboard/hp/dl165_g6_fam10/devicetree.cb b/src/mainboard/hp/dl165_g6_fam10/devicetree.cb index 3c1302b5aa..1da52efc20 100644 --- a/src/mainboard/hp/dl165_g6_fam10/devicetree.cb +++ b/src/mainboard/hp/dl165_g6_fam10/devicetree.cb @@ -4,7 +4,7 @@ chip northbridge/amd/amdfam10/root_complex device lapic 0 on end end end - device pci_domain 0 on + device domain 0 on chip northbridge/amd/amdfam10 # northbridge device pci 18.0 on end device pci 18.0 on end @@ -84,7 +84,7 @@ chip northbridge/amd/amdfam10/root_complex device pci 18.4 on end end # amdfam10 - end #pci_domain + end #domain end diff --git a/src/mainboard/hp/e_vectra_p2706t/devicetree.cb b/src/mainboard/hp/e_vectra_p2706t/devicetree.cb index 4a65844207..0f1474b7ca 100644 --- a/src/mainboard/hp/e_vectra_p2706t/devicetree.cb +++ b/src/mainboard/hp/e_vectra_p2706t/devicetree.cb @@ -5,7 +5,7 @@ chip northbridge/intel/i82810 # Northbridge device lapic 0 on end # APIC end end - device pci_domain 0 on + device domain 0 on device pci 0.0 on end # Host bridge device pci 1.0 on end # Onboard VGA chip southbridge/intel/i82801ax # Southbridge diff --git a/src/mainboard/ibase/mb899/devicetree.cb b/src/mainboard/ibase/mb899/devicetree.cb index 3fbe86314c..0d92bdb932 100644 --- a/src/mainboard/ibase/mb899/devicetree.cb +++ b/src/mainboard/ibase/mb899/devicetree.cb @@ -6,7 +6,7 @@ chip northbridge/intel/i945 end end - device pci_domain 0 on + device domain 0 on device pci 00.0 on end # host bridge device pci 01.0 off end # i945 PCIe root port device pci 02.0 on end # vga controller diff --git a/src/mainboard/ibm/e325/devicetree.cb b/src/mainboard/ibm/e325/devicetree.cb index 331e632add..9654b3f9a3 100644 --- a/src/mainboard/ibm/e325/devicetree.cb +++ b/src/mainboard/ibm/e325/devicetree.cb @@ -4,7 +4,7 @@ chip northbridge/amd/amdk8/root_complex device lapic 0 on end end end - device pci_domain 0 on + device domain 0 on chip northbridge/amd/amdk8 device pci 18.0 on end # LDT 0 device pci 18.0 on # LDT 1 diff --git a/src/mainboard/ibm/e326/devicetree.cb b/src/mainboard/ibm/e326/devicetree.cb index 8826439a5c..785f357cf1 100644 --- a/src/mainboard/ibm/e326/devicetree.cb +++ b/src/mainboard/ibm/e326/devicetree.cb @@ -5,7 +5,7 @@ chip northbridge/amd/amdk8/root_complex end end - device pci_domain 0 on + device domain 0 on chip northbridge/amd/amdk8 device pci 18.0 on end # LDT 0 device pci 18.0 on # LDT 1 diff --git a/src/mainboard/iei/juki-511p/devicetree.cb b/src/mainboard/iei/juki-511p/devicetree.cb index 8592c091db..4706ff59f6 100644 --- a/src/mainboard/iei/juki-511p/devicetree.cb +++ b/src/mainboard/iei/juki-511p/devicetree.cb @@ -1,5 +1,5 @@ chip northbridge/amd/gx1 - device pci_domain 0 on + device domain 0 on device pci 0.0 on end chip southbridge/amd/cs5530 diff --git a/src/mainboard/iei/kino-780am2-fam10/devicetree.cb b/src/mainboard/iei/kino-780am2-fam10/devicetree.cb index 06d2d32201..019582294b 100644 --- a/src/mainboard/iei/kino-780am2-fam10/devicetree.cb +++ b/src/mainboard/iei/kino-780am2-fam10/devicetree.cb @@ -5,7 +5,7 @@ chip northbridge/amd/amdfam10/root_complex device lapic 0 on end end end - device pci_domain 0 on + device domain 0 on chip northbridge/amd/amdfam10 device pci 18.0 on # northbridge chip southbridge/amd/rs780 @@ -66,6 +66,6 @@ chip northbridge/amd/amdfam10/root_complex device pci 18.2 on end device pci 18.3 on end end - end #pci_domain + end #domain end #root_complex diff --git a/src/mainboard/iei/nova4899r/devicetree.cb b/src/mainboard/iei/nova4899r/devicetree.cb index 8055fb1e68..f27662eb6f 100644 --- a/src/mainboard/iei/nova4899r/devicetree.cb +++ b/src/mainboard/iei/nova4899r/devicetree.cb @@ -1,5 +1,5 @@ chip northbridge/amd/gx1 - device pci_domain 0 on + device domain 0 on device pci 0.0 on end chip southbridge/amd/cs5530 device pci 0a.0 on end # ETH0 diff --git a/src/mainboard/iei/pcisa-lx-800-r10/devicetree.cb b/src/mainboard/iei/pcisa-lx-800-r10/devicetree.cb index 2d37ecf438..5360fcc7da 100644 --- a/src/mainboard/iei/pcisa-lx-800-r10/devicetree.cb +++ b/src/mainboard/iei/pcisa-lx-800-r10/devicetree.cb @@ -1,5 +1,5 @@ chip northbridge/amd/lx - device pci_domain 0 on + device domain 0 on device pci 1.0 on end # Northbridge device pci 1.1 on end # Graphics chip southbridge/amd/cs5536 diff --git a/src/mainboard/iei/pm-lx-800-r11/devicetree.cb b/src/mainboard/iei/pm-lx-800-r11/devicetree.cb index c2776061f1..2bb840e2ba 100644 --- a/src/mainboard/iei/pm-lx-800-r11/devicetree.cb +++ b/src/mainboard/iei/pm-lx-800-r11/devicetree.cb @@ -20,7 +20,7 @@ ## chip northbridge/amd/lx - device pci_domain 0 on + device domain 0 on device pci 1.0 on end # Northbridge device pci 1.1 on end # Video Adapter device pci 1.2 on end # AES Security Block diff --git a/src/mainboard/iei/pm-lx2-800-r10/devicetree.cb b/src/mainboard/iei/pm-lx2-800-r10/devicetree.cb index ff60894fd2..5b6d73a468 100644 --- a/src/mainboard/iei/pm-lx2-800-r10/devicetree.cb +++ b/src/mainboard/iei/pm-lx2-800-r10/devicetree.cb @@ -20,7 +20,7 @@ ## chip northbridge/amd/lx - device pci_domain 0 on + device domain 0 on device pci 1.0 on end # Northbridge device pci 1.1 on end # Video Adapter device pci 1.2 on end # AES Security Block diff --git a/src/mainboard/intel/d810e2cb/devicetree.cb b/src/mainboard/intel/d810e2cb/devicetree.cb index 412933632d..f5afa92717 100644 --- a/src/mainboard/intel/d810e2cb/devicetree.cb +++ b/src/mainboard/intel/d810e2cb/devicetree.cb @@ -24,7 +24,7 @@ chip northbridge/intel/i82810 # Northbridge device lapic 0 on end # APIC end end - device pci_domain 0 on # PCI domain + device domain 0 on # PCI domain device pci 0.0 on end # Graphics Memory Controller Hub (GMCH) device pci 1.0 on end # Chipset Graphics Controller (CGC) chip southbridge/intel/i82801bx # Southbridge diff --git a/src/mainboard/intel/d945gclf/devicetree.cb b/src/mainboard/intel/d945gclf/devicetree.cb index a58d99e61e..6a4b353e99 100644 --- a/src/mainboard/intel/d945gclf/devicetree.cb +++ b/src/mainboard/intel/d945gclf/devicetree.cb @@ -25,7 +25,7 @@ chip northbridge/intel/i945 end end - device pci_domain 0 on + device domain 0 on subsystemid 0x8086 0x464c inherit device pci 00.0 on end # host bridge device pci 01.0 off end # i945 PCIe root port diff --git a/src/mainboard/intel/eagleheights/devicetree.cb b/src/mainboard/intel/eagleheights/devicetree.cb index 9971264169..5a272c15d5 100644 --- a/src/mainboard/intel/eagleheights/devicetree.cb +++ b/src/mainboard/intel/eagleheights/devicetree.cb @@ -1,5 +1,5 @@ chip northbridge/intel/i3100 - device pci_domain 0 on + device domain 0 on device pci 00.0 on end # IMCH device pci 00.1 on end # IMCH error status device pci 01.0 on end # IMCH EDMA engine diff --git a/src/mainboard/intel/emeraldlake2/devicetree.cb b/src/mainboard/intel/emeraldlake2/devicetree.cb index 686fe2e347..1d0ed42d3c 100644 --- a/src/mainboard/intel/emeraldlake2/devicetree.cb +++ b/src/mainboard/intel/emeraldlake2/devicetree.cb @@ -27,7 +27,7 @@ chip northbridge/intel/sandybridge end end - device pci_domain 0 on + device domain 0 on device pci 00.0 on end # host bridge device pci 02.0 on end # vga controller diff --git a/src/mainboard/intel/jarrell/devicetree.cb b/src/mainboard/intel/jarrell/devicetree.cb index fb32a089e3..b5c3ece796 100644 --- a/src/mainboard/intel/jarrell/devicetree.cb +++ b/src/mainboard/intel/jarrell/devicetree.cb @@ -1,5 +1,5 @@ chip northbridge/intel/e7520 - device pci_domain 0 on + device domain 0 on subsystemid 0x8086 0x1079 inherit device pci 00.0 on end device pci 00.1 on end diff --git a/src/mainboard/intel/mtarvon/devicetree.cb b/src/mainboard/intel/mtarvon/devicetree.cb index cd7df2d1d2..61ead86ee7 100644 --- a/src/mainboard/intel/mtarvon/devicetree.cb +++ b/src/mainboard/intel/mtarvon/devicetree.cb @@ -1,5 +1,5 @@ chip northbridge/intel/i3100 - device pci_domain 0 on + device domain 0 on subsystemid 0x8086 0x2680 inherit device pci 00.0 on end # IMCH device pci 00.1 on end # IMCH error status diff --git a/src/mainboard/intel/truxton/devicetree.cb b/src/mainboard/intel/truxton/devicetree.cb index 486601a420..23e98d3582 100644 --- a/src/mainboard/intel/truxton/devicetree.cb +++ b/src/mainboard/intel/truxton/devicetree.cb @@ -1,5 +1,5 @@ chip northbridge/intel/i3100 - device pci_domain 0 on + device domain 0 on subsystemid 0x8086 0x2680 inherit device pci 00.0 on end # IMCH device pci 00.1 on end # IMCH error status diff --git a/src/mainboard/intel/xe7501devkit/devicetree.cb b/src/mainboard/intel/xe7501devkit/devicetree.cb index 18ee64e0db..75d918e3c8 100644 --- a/src/mainboard/intel/xe7501devkit/devicetree.cb +++ b/src/mainboard/intel/xe7501devkit/devicetree.cb @@ -1,5 +1,5 @@ chip northbridge/intel/e7501 - device pci_domain 0 on + device domain 0 on subsystemid 0x8086 0x2480 inherit device pci 0.0 on end # Chipset host controller device pci 0.1 on end # Host RASUM controller @@ -61,7 +61,7 @@ chip northbridge/intel/e7501 device pci 1f.5 off end # AC97 Audio device pci 1f.6 off end # AC97 Modem end # SB - end # PCI_DOMAIN + end # PCI domain device lapic_cluster 0 on chip cpu/intel/socket_mPGA604 device lapic 0 on end diff --git a/src/mainboard/iwave/iWRainbowG6/devicetree.cb b/src/mainboard/iwave/iWRainbowG6/devicetree.cb index efae82b8ec..7c46a8f209 100644 --- a/src/mainboard/iwave/iWRainbowG6/devicetree.cb +++ b/src/mainboard/iwave/iWRainbowG6/devicetree.cb @@ -6,7 +6,7 @@ chip northbridge/intel/sch end end - device pci_domain 0 on + device domain 0 on device pci 00.0 on end # host bridge device pci 02.0 on end # Integrated Graphics and Video Device diff --git a/src/mainboard/iwill/dk8_htx/devicetree.cb b/src/mainboard/iwill/dk8_htx/devicetree.cb index d0cff02273..3f9bbcece0 100644 --- a/src/mainboard/iwill/dk8_htx/devicetree.cb +++ b/src/mainboard/iwill/dk8_htx/devicetree.cb @@ -4,7 +4,7 @@ chip northbridge/amd/amdk8/root_complex device lapic 0 on end end end - device pci_domain 0 on + device domain 0 on subsystemid 0x1022 0x2b80 inherit chip northbridge/amd/amdk8 device pci 18.0 on end @@ -113,7 +113,7 @@ chip northbridge/amd/amdk8/root_complex device pci 18.3 on end end - end #pci_domain + end #domain # chip drivers/generic/debug # device pnp 0.0 off end # chip name # device pnp 0.1 on end # pci_regs_all diff --git a/src/mainboard/iwill/dk8s2/devicetree.cb b/src/mainboard/iwill/dk8s2/devicetree.cb index f234c35030..0220c309f9 100644 --- a/src/mainboard/iwill/dk8s2/devicetree.cb +++ b/src/mainboard/iwill/dk8s2/devicetree.cb @@ -4,7 +4,7 @@ chip northbridge/amd/amdk8/root_complex device lapic 0 on end end end - device pci_domain 0 on + device domain 0 on subsystemid 0x161f 0x3016 inherit chip northbridge/amd/amdk8 device pci 18.0 on # LDT 0 diff --git a/src/mainboard/iwill/dk8x/devicetree.cb b/src/mainboard/iwill/dk8x/devicetree.cb index 3888805476..5604d7fe22 100644 --- a/src/mainboard/iwill/dk8x/devicetree.cb +++ b/src/mainboard/iwill/dk8x/devicetree.cb @@ -4,7 +4,7 @@ chip northbridge/amd/amdk8/root_complex device lapic 0 on end end end - device pci_domain 0 on + device domain 0 on chip northbridge/amd/amdk8 device pci 18.0 on # northbridge # devices on link 0, link 0 == LDT 0 diff --git a/src/mainboard/jetway/j7f24/devicetree.cb b/src/mainboard/jetway/j7f24/devicetree.cb index 16dd2f6d7b..ace327766f 100644 --- a/src/mainboard/jetway/j7f24/devicetree.cb +++ b/src/mainboard/jetway/j7f24/devicetree.cb @@ -1,5 +1,5 @@ chip northbridge/via/cn700 # Northbridge - device pci_domain 0 on # PCI domain + device domain 0 on # PCI domain device pci 0.0 on end # AGP Bridge device pci 0.1 on end # Error Reporting device pci 0.2 on end # Host Bus Control diff --git a/src/mainboard/jetway/pa78vm5/devicetree.cb b/src/mainboard/jetway/pa78vm5/devicetree.cb index 6913d79f9f..116e7b5d9f 100644 --- a/src/mainboard/jetway/pa78vm5/devicetree.cb +++ b/src/mainboard/jetway/pa78vm5/devicetree.cb @@ -5,7 +5,7 @@ chip northbridge/amd/amdfam10/root_complex device lapic 0 on end end end - device pci_domain 0 on + device domain 0 on subsystemid 0x1022 0x3060 inherit chip northbridge/amd/amdfam10 device pci 18.0 on # northbridge @@ -104,7 +104,7 @@ chip northbridge/amd/amdfam10/root_complex device pci 18.4 on end # device pci 00.5 on end end - end #pci_domain + end #domain #for node 32 to node 63 end diff --git a/src/mainboard/kontron/986lcd-m/devicetree.cb b/src/mainboard/kontron/986lcd-m/devicetree.cb index b848d40001..ee738b2964 100644 --- a/src/mainboard/kontron/986lcd-m/devicetree.cb +++ b/src/mainboard/kontron/986lcd-m/devicetree.cb @@ -6,7 +6,7 @@ chip northbridge/intel/i945 end end - device pci_domain 0 on + device domain 0 on device pci 00.0 on end # host bridge device pci 01.0 off end # i945 PCIe root port device pci 02.0 on end # vga controller diff --git a/src/mainboard/kontron/kt690/devicetree.cb b/src/mainboard/kontron/kt690/devicetree.cb index 68741aeaa2..dc4945beef 100644 --- a/src/mainboard/kontron/kt690/devicetree.cb +++ b/src/mainboard/kontron/kt690/devicetree.cb @@ -14,7 +14,7 @@ chip northbridge/amd/amdk8/root_complex device lapic 0 on end end end - device pci_domain 0 on + device domain 0 on subsystemid 0x1488 0x6900 inherit chip northbridge/amd/amdk8 device pci 18.0 on # southbridge @@ -121,6 +121,6 @@ chip northbridge/amd/amdk8/root_complex device pci 18.2 on end device pci 18.3 on end end #northbridge/amd/amdk8 - end #pci_domain + end #domain end #northbridge/amd/amdk8/root_complex diff --git a/src/mainboard/lanner/em8510/devicetree.cb b/src/mainboard/lanner/em8510/devicetree.cb index 5f17fba36a..a7b43fda6a 100644 --- a/src/mainboard/lanner/em8510/devicetree.cb +++ b/src/mainboard/lanner/em8510/devicetree.cb @@ -1,5 +1,5 @@ chip northbridge/intel/i855 - device pci_domain 0 on + device domain 0 on device pci 0.0 on end chip southbridge/intel/i82801dx # pci 11.0 on end diff --git a/src/mainboard/lenovo/t60/devicetree.cb b/src/mainboard/lenovo/t60/devicetree.cb index f8ba13723f..7bde52fb16 100644 --- a/src/mainboard/lenovo/t60/devicetree.cb +++ b/src/mainboard/lenovo/t60/devicetree.cb @@ -28,7 +28,7 @@ chip northbridge/intel/i945 end end - device pci_domain 0 on + device domain 0 on device pci 00.0 on # Host bridge subsystemid 0x17aa 0x2015 end diff --git a/src/mainboard/lenovo/x60/devicetree.cb b/src/mainboard/lenovo/x60/devicetree.cb index 2f0a1792de..d5d527418e 100644 --- a/src/mainboard/lenovo/x60/devicetree.cb +++ b/src/mainboard/lenovo/x60/devicetree.cb @@ -28,7 +28,7 @@ chip northbridge/intel/i945 end end - device pci_domain 0 on + device domain 0 on device pci 00.0 on # Host bridge subsystemid 0x17aa 0x2017 end diff --git a/src/mainboard/lippert/frontrunner/devicetree.cb b/src/mainboard/lippert/frontrunner/devicetree.cb index 63ac140136..7046158774 100644 --- a/src/mainboard/lippert/frontrunner/devicetree.cb +++ b/src/mainboard/lippert/frontrunner/devicetree.cb @@ -5,7 +5,7 @@ chip northbridge/amd/gx2 end end - device pci_domain 0 on + device domain 0 on device pci 0.0 on end chip southbridge/amd/cs5535 register "setupflash" = "0" diff --git a/src/mainboard/lippert/hurricane-lx/devicetree.cb b/src/mainboard/lippert/hurricane-lx/devicetree.cb index 5aa4cd4dd6..98e0744f69 100644 --- a/src/mainboard/lippert/hurricane-lx/devicetree.cb +++ b/src/mainboard/lippert/hurricane-lx/devicetree.cb @@ -1,5 +1,5 @@ chip northbridge/amd/lx - device pci_domain 0 on + device domain 0 on device pci 1.0 on end # Northbridge device pci 1.1 on end # Graphics device pci 1.2 on end # AES diff --git a/src/mainboard/lippert/literunner-lx/devicetree.cb b/src/mainboard/lippert/literunner-lx/devicetree.cb index b14247121c..65119fc50b 100644 --- a/src/mainboard/lippert/literunner-lx/devicetree.cb +++ b/src/mainboard/lippert/literunner-lx/devicetree.cb @@ -1,5 +1,5 @@ chip northbridge/amd/lx - device pci_domain 0 on + device domain 0 on device pci 1.0 on end # Northbridge device pci 1.1 on end # Graphics device pci 1.2 on end # AES diff --git a/src/mainboard/lippert/roadrunner-lx/devicetree.cb b/src/mainboard/lippert/roadrunner-lx/devicetree.cb index 73d1d88276..f3bd5885fa 100644 --- a/src/mainboard/lippert/roadrunner-lx/devicetree.cb +++ b/src/mainboard/lippert/roadrunner-lx/devicetree.cb @@ -1,5 +1,5 @@ chip northbridge/amd/lx - device pci_domain 0 on + device domain 0 on device pci 1.0 on end # Northbridge device pci 1.1 on end # Graphics device pci 1.2 on end # AES diff --git a/src/mainboard/lippert/spacerunner-lx/devicetree.cb b/src/mainboard/lippert/spacerunner-lx/devicetree.cb index 4bb15087db..a4edbe8eed 100644 --- a/src/mainboard/lippert/spacerunner-lx/devicetree.cb +++ b/src/mainboard/lippert/spacerunner-lx/devicetree.cb @@ -1,5 +1,5 @@ chip northbridge/amd/lx - device pci_domain 0 on + device domain 0 on device pci 1.0 on end # Northbridge device pci 1.1 on end # Graphics device pci 1.2 on end # AES diff --git a/src/mainboard/mitac/6513wu/devicetree.cb b/src/mainboard/mitac/6513wu/devicetree.cb index df2d2cec4b..4e995d9226 100644 --- a/src/mainboard/mitac/6513wu/devicetree.cb +++ b/src/mainboard/mitac/6513wu/devicetree.cb @@ -24,7 +24,7 @@ chip northbridge/intel/i82810 # Northbridge device lapic 0 on end # APIC end end - device pci_domain 0 on # PCI domain + device domain 0 on # PCI domain device pci 0.0 on end # Graphics Memory Controller Hub (GMCH) device pci 1.0 on end chip southbridge/intel/i82801ax # Southbridge diff --git a/src/mainboard/msi/ms6119/devicetree.cb b/src/mainboard/msi/ms6119/devicetree.cb index d5be59fe63..6829a3ab2c 100644 --- a/src/mainboard/msi/ms6119/devicetree.cb +++ b/src/mainboard/msi/ms6119/devicetree.cb @@ -4,7 +4,7 @@ chip northbridge/intel/i440bx # Northbridge device lapic 0 on end # APIC end end - device pci_domain 0 on # PCI domain + device domain 0 on # PCI domain device pci 0.0 on end # Host bridge device pci 1.0 on end # PCI/AGP bridge chip southbridge/intel/i82371eb # Southbridge diff --git a/src/mainboard/msi/ms6147/devicetree.cb b/src/mainboard/msi/ms6147/devicetree.cb index 0500a7f935..3792e212cf 100644 --- a/src/mainboard/msi/ms6147/devicetree.cb +++ b/src/mainboard/msi/ms6147/devicetree.cb @@ -4,7 +4,7 @@ chip northbridge/intel/i440bx # Northbridge device lapic 0 on end # APIC end end - device pci_domain 0 on # PCI domain + device domain 0 on # PCI domain device pci 0.0 on end # Host bridge device pci 1.0 on end # PCI/AGP bridge chip southbridge/intel/i82371eb # Southbridge diff --git a/src/mainboard/msi/ms6156/devicetree.cb b/src/mainboard/msi/ms6156/devicetree.cb index da3ba6f140..e038513b8a 100644 --- a/src/mainboard/msi/ms6156/devicetree.cb +++ b/src/mainboard/msi/ms6156/devicetree.cb @@ -24,7 +24,7 @@ chip northbridge/intel/i440bx # Northbridge device lapic 0 on end # APIC end end - device pci_domain 0 on # PCI domain + device domain 0 on # PCI domain device pci 0.0 on end # Host bridge device pci 1.0 on end # PCI/AGP bridge chip southbridge/intel/i82371eb # Southbridge diff --git a/src/mainboard/msi/ms6178/devicetree.cb b/src/mainboard/msi/ms6178/devicetree.cb index 569aee52d7..c91ea0a306 100644 --- a/src/mainboard/msi/ms6178/devicetree.cb +++ b/src/mainboard/msi/ms6178/devicetree.cb @@ -24,7 +24,7 @@ chip northbridge/intel/i82810 # Northbridge device lapic 0 on end # APIC end end - device pci_domain 0 on + device domain 0 on device pci 0.0 on end # Host bridge device pci 1.0 on end # Onboard VGA chip southbridge/intel/i82801ax # Southbridge diff --git a/src/mainboard/msi/ms7135/devicetree.cb b/src/mainboard/msi/ms7135/devicetree.cb index 54e5d5e599..9546acda40 100644 --- a/src/mainboard/msi/ms7135/devicetree.cb +++ b/src/mainboard/msi/ms7135/devicetree.cb @@ -5,7 +5,7 @@ chip northbridge/amd/amdk8/root_complex # Root complex end end - device pci_domain 0 on # PCI domain + device domain 0 on # PCI domain subsystemid 0x1462 0x7135 inherit chip northbridge/amd/amdk8 # Northbridge / RAM controller device pci 18.0 on # Link 0 == LDT 0 diff --git a/src/mainboard/msi/ms7260/devicetree.cb b/src/mainboard/msi/ms7260/devicetree.cb index 47d5381b5c..fe320ecd79 100644 --- a/src/mainboard/msi/ms7260/devicetree.cb +++ b/src/mainboard/msi/ms7260/devicetree.cb @@ -4,7 +4,7 @@ chip northbridge/amd/amdk8/root_complex # Root complex device lapic 0 on end # Local APIC of the CPU end end - device pci_domain 0 on # PCI domain + device domain 0 on # PCI domain subsystemid 0x1462 0x7260 inherit chip northbridge/amd/amdk8 # Northbridge / RAM controller device pci 18.0 on # Link 0 == LDT 0 diff --git a/src/mainboard/msi/ms9185/devicetree.cb b/src/mainboard/msi/ms9185/devicetree.cb index 9576225e91..b41a1624cd 100644 --- a/src/mainboard/msi/ms9185/devicetree.cb +++ b/src/mainboard/msi/ms9185/devicetree.cb @@ -4,7 +4,7 @@ chip northbridge/amd/amdk8/root_complex device lapic 0 on end end end - device pci_domain 0 on + device domain 0 on subsystemid 0x1022 0x2b80 inherit chip northbridge/amd/amdk8 device pci 18.0 on end @@ -81,7 +81,7 @@ chip northbridge/amd/amdk8/root_complex device pci 18.2 on end device pci 18.3 on end end # amdk8 - end #pci_domain + end #domain # chip drivers/generic/debug # device pnp 0.0 off end # chip name # device pnp 0.1 on end # pci_regs_all diff --git a/src/mainboard/msi/ms9282/devicetree.cb b/src/mainboard/msi/ms9282/devicetree.cb index b52e7ed650..8b46deb74f 100644 --- a/src/mainboard/msi/ms9282/devicetree.cb +++ b/src/mainboard/msi/ms9282/devicetree.cb @@ -4,7 +4,7 @@ chip northbridge/amd/amdk8/root_complex # Root complex device lapic 0 on end # Local APIC of the CPU end end - device pci_domain 0 on # PCI domain + device domain 0 on # PCI domain subsystemid 0x1462 0x9282 inherit chip northbridge/amd/amdk8 # Northbridge / RAM controller device pci 18.0 on # Link 0 == LDT 0 diff --git a/src/mainboard/msi/ms9652_fam10/devicetree.cb b/src/mainboard/msi/ms9652_fam10/devicetree.cb index 0e9a3ffe3e..4060ae50dd 100644 --- a/src/mainboard/msi/ms9652_fam10/devicetree.cb +++ b/src/mainboard/msi/ms9652_fam10/devicetree.cb @@ -27,7 +27,7 @@ chip northbridge/amd/amdfam10/root_complex # Root complex device lapic 0 on end # Local APIC of the CPU end end - device pci_domain 0 on # PCI domain + device domain 0 on # PCI domain subsystemid 0x1462 0x9652 inherit chip northbridge/amd/amdfam10 # Northbridge / RAM controller device pci 18.0 on # Link 0 diff --git a/src/mainboard/nec/powermate2000/devicetree.cb b/src/mainboard/nec/powermate2000/devicetree.cb index 37a15e1ab3..daa7551240 100644 --- a/src/mainboard/nec/powermate2000/devicetree.cb +++ b/src/mainboard/nec/powermate2000/devicetree.cb @@ -4,7 +4,7 @@ chip northbridge/intel/i82810 # Northbridge device lapic 0 on end # APIC end end - device pci_domain 0 on + device domain 0 on device pci 0.0 on end # Host bridge device pci 1.0 off end # Onboard video chip southbridge/intel/i82801ax # Southbridge diff --git a/src/mainboard/newisys/khepri/devicetree.cb b/src/mainboard/newisys/khepri/devicetree.cb index 9cdbc9c661..cc6e9b7460 100644 --- a/src/mainboard/newisys/khepri/devicetree.cb +++ b/src/mainboard/newisys/khepri/devicetree.cb @@ -5,7 +5,7 @@ chip northbridge/amd/amdk8/root_complex end end - device pci_domain 0 on + device domain 0 on subsystemid 0x17c2 0x0010 inherit chip northbridge/amd/amdk8 device pci 18.0 on end # LDT 0 diff --git a/src/mainboard/nokia/ip530/devicetree.cb b/src/mainboard/nokia/ip530/devicetree.cb index f89d1cd9fe..6d109cc060 100644 --- a/src/mainboard/nokia/ip530/devicetree.cb +++ b/src/mainboard/nokia/ip530/devicetree.cb @@ -24,7 +24,7 @@ chip northbridge/intel/i440bx # Northbridge device lapic 0 on end # Local APIC of the CPU end end - device pci_domain 0 on # PCI domain + device domain 0 on # PCI domain device pci 0.0 on end # Host bridge device pci 1.0 on end # PCI/AGP bridge chip southbridge/intel/i82371eb # Southbridge diff --git a/src/mainboard/nvidia/l1_2pvv/devicetree.cb b/src/mainboard/nvidia/l1_2pvv/devicetree.cb index 9a807107cb..fff1f6a98a 100644 --- a/src/mainboard/nvidia/l1_2pvv/devicetree.cb +++ b/src/mainboard/nvidia/l1_2pvv/devicetree.cb @@ -4,7 +4,7 @@ chip northbridge/amd/amdk8/root_complex # Root complex device lapic 0 on end # Local APIC of the CPU end end - device pci_domain 0 on # PCI domain + device domain 0 on # PCI domain subsystemid 0x1022 0x2b80 inherit chip northbridge/amd/amdk8 # Northbridge / RAM controller device pci 18.0 on # Link 0 == LDT 0 diff --git a/src/mainboard/pcengines/alix1c/devicetree.cb b/src/mainboard/pcengines/alix1c/devicetree.cb index 91d935038b..8e0ece038d 100644 --- a/src/mainboard/pcengines/alix1c/devicetree.cb +++ b/src/mainboard/pcengines/alix1c/devicetree.cb @@ -1,5 +1,5 @@ chip northbridge/amd/lx - device pci_domain 0 on + device domain 0 on device pci 1.0 on end device pci 1.1 on end chip southbridge/amd/cs5536 diff --git a/src/mainboard/pcengines/alix2d/devicetree.cb b/src/mainboard/pcengines/alix2d/devicetree.cb index 836ba3547c..97327969d9 100644 --- a/src/mainboard/pcengines/alix2d/devicetree.cb +++ b/src/mainboard/pcengines/alix2d/devicetree.cb @@ -1,5 +1,5 @@ chip northbridge/amd/lx - device pci_domain 0 on + device domain 0 on device pci 1.0 on end device pci 1.1 on end chip southbridge/amd/cs5536 diff --git a/src/mainboard/rca/rm4100/devicetree.cb b/src/mainboard/rca/rm4100/devicetree.cb index 5c22eaafae..7fb73e1a68 100644 --- a/src/mainboard/rca/rm4100/devicetree.cb +++ b/src/mainboard/rca/rm4100/devicetree.cb @@ -4,7 +4,7 @@ chip northbridge/intel/i82830 # Northbridge device lapic 0 on end # APIC end end - device pci_domain 0 on # PCI domain + device domain 0 on # PCI domain device pci 0.0 on end # Host bridge device pci 2.0 on end # VGA (Intel 82830 CGC) chip southbridge/intel/i82801dx # Southbridge diff --git a/src/mainboard/roda/rk886ex/devicetree.cb b/src/mainboard/roda/rk886ex/devicetree.cb index aadba9d8f2..502b0320f9 100644 --- a/src/mainboard/roda/rk886ex/devicetree.cb +++ b/src/mainboard/roda/rk886ex/devicetree.cb @@ -27,7 +27,7 @@ chip northbridge/intel/i945 end end - device pci_domain 0 on + device domain 0 on subsystemid 0x4352 0x6886 inherit device pci 00.0 on end # host bridge # auto detection: diff --git a/src/mainboard/roda/rk9/devicetree.cb b/src/mainboard/roda/rk9/devicetree.cb index 002f595626..192681e5fb 100644 --- a/src/mainboard/roda/rk9/devicetree.cb +++ b/src/mainboard/roda/rk9/devicetree.cb @@ -16,7 +16,7 @@ chip northbridge/intel/gm45 end end - device pci_domain 0 on + device domain 0 on subsystemid 0x4352 0x8986 device pci 00.0 on end # host bridge device pci 02.0 on # VGA diff --git a/src/mainboard/samsung/lumpy/devicetree.cb b/src/mainboard/samsung/lumpy/devicetree.cb index 7a2ee6ce1d..c2f091d439 100644 --- a/src/mainboard/samsung/lumpy/devicetree.cb +++ b/src/mainboard/samsung/lumpy/devicetree.cb @@ -32,7 +32,7 @@ chip northbridge/intel/sandybridge end end - device pci_domain 0 on + device domain 0 on ioapic_irq 4 INTA 0x10 ioapic_irq 4 INTB 0x11 ioapic_irq 4 INTC 0x12 diff --git a/src/mainboard/samsung/stumpy/devicetree.cb b/src/mainboard/samsung/stumpy/devicetree.cb index b59dcb2529..925b71da52 100644 --- a/src/mainboard/samsung/stumpy/devicetree.cb +++ b/src/mainboard/samsung/stumpy/devicetree.cb @@ -27,7 +27,7 @@ chip northbridge/intel/sandybridge end end - device pci_domain 0 on + device domain 0 on subsystemid 0x1ae0 0xc000 inherit device pci 00.0 on end # host bridge device pci 02.0 on end # vga controller diff --git a/src/mainboard/siemens/sitemp_g1p1/devicetree.cb b/src/mainboard/siemens/sitemp_g1p1/devicetree.cb index 6f068e4823..d01d5a8a82 100644 --- a/src/mainboard/siemens/sitemp_g1p1/devicetree.cb +++ b/src/mainboard/siemens/sitemp_g1p1/devicetree.cb @@ -14,7 +14,7 @@ chip northbridge/amd/amdk8/root_complex device lapic 0 on end end end - device pci_domain 0 on + device domain 0 on subsystemid 0x110a 0x4076 inherit chip northbridge/amd/amdk8 device pci 18.0 on # southbridge @@ -130,6 +130,6 @@ chip northbridge/amd/amdk8/root_complex device pci 18.2 on end device pci 18.3 on end end #northbridge/amd/amdk8 - end #pci_domain + end #domain end #northbridge/amd/amdk8/root_complex diff --git a/src/mainboard/soyo/sy-6ba-plus-iii/devicetree.cb b/src/mainboard/soyo/sy-6ba-plus-iii/devicetree.cb index 03451e2421..c39a2ce554 100644 --- a/src/mainboard/soyo/sy-6ba-plus-iii/devicetree.cb +++ b/src/mainboard/soyo/sy-6ba-plus-iii/devicetree.cb @@ -24,7 +24,7 @@ chip northbridge/intel/i440bx # Northbridge device lapic 0 on end # APIC end end - device pci_domain 0 on # PCI domain + device domain 0 on # PCI domain device pci 0.0 on end # Host bridge device pci 1.0 on end # PCI/AGP bridge chip southbridge/intel/i82371eb # Southbridge diff --git a/src/mainboard/sunw/ultra40/devicetree.cb b/src/mainboard/sunw/ultra40/devicetree.cb index f355200ce6..fe5bf33f23 100644 --- a/src/mainboard/sunw/ultra40/devicetree.cb +++ b/src/mainboard/sunw/ultra40/devicetree.cb @@ -4,7 +4,7 @@ chip northbridge/amd/amdk8/root_complex # Root complex device lapic 0 on end # Local APIC of the CPU end end - device pci_domain 0 on # PCI domain + device domain 0 on # PCI domain subsystemid 0x108e 0x0040 inherit chip northbridge/amd/amdk8 # Northbridge / RAM controller device pci 18.0 on end diff --git a/src/mainboard/supermicro/h8dme/devicetree.cb b/src/mainboard/supermicro/h8dme/devicetree.cb index 73a43e8271..0c8cf61722 100644 --- a/src/mainboard/supermicro/h8dme/devicetree.cb +++ b/src/mainboard/supermicro/h8dme/devicetree.cb @@ -4,7 +4,7 @@ chip northbridge/amd/amdk8/root_complex # Root complex device lapic 0 on end # Local APIC of the CPU end end - device pci_domain 0 on # PCI domain + device domain 0 on # PCI domain subsystemid 0x15d9 0x1511 inherit chip northbridge/amd/amdk8 # Northbridge / RAM controller device pci 18.0 on end diff --git a/src/mainboard/supermicro/h8dmr/devicetree.cb b/src/mainboard/supermicro/h8dmr/devicetree.cb index 6c96ac0dea..3d1e994d2f 100644 --- a/src/mainboard/supermicro/h8dmr/devicetree.cb +++ b/src/mainboard/supermicro/h8dmr/devicetree.cb @@ -4,7 +4,7 @@ chip northbridge/amd/amdk8/root_complex # Root complex device lapic 0 on end # Local APIC of the CPU end end - device pci_domain 0 on # PCI domain + device domain 0 on # PCI domain subsystemid 0x15d9 0x1511 inherit chip northbridge/amd/amdk8 # Northbridge / RAM controller device pci 18.0 on end diff --git a/src/mainboard/supermicro/h8dmr_fam10/devicetree.cb b/src/mainboard/supermicro/h8dmr_fam10/devicetree.cb index 6c4443f902..e7fe9e41ba 100644 --- a/src/mainboard/supermicro/h8dmr_fam10/devicetree.cb +++ b/src/mainboard/supermicro/h8dmr_fam10/devicetree.cb @@ -4,7 +4,7 @@ chip northbridge/amd/amdfam10/root_complex # Root complex device lapic 0 on end # Local APIC of the CPU end end - device pci_domain 0 on # PCI domain + device domain 0 on # PCI domain subsystemid 0x15d9 0x1511 inherit chip northbridge/amd/amdfam10 # Northbridge / RAM controller device pci 18.0 on end diff --git a/src/mainboard/supermicro/h8qgi/devicetree.cb b/src/mainboard/supermicro/h8qgi/devicetree.cb index 48797d56d9..8365346bc7 100644 --- a/src/mainboard/supermicro/h8qgi/devicetree.cb +++ b/src/mainboard/supermicro/h8qgi/devicetree.cb @@ -23,7 +23,7 @@ chip northbridge/amd/agesa/family15/root_complex #device lapic 0x10 on end #f10 end end - device pci_domain 0 on + device domain 0 on subsystemid 0x15d9 0xab11 inherit #SuperMicro chip northbridge/amd/agesa/family15 # CPU side of HT root complex device pci 18.0 on # Put IO-HUB at link_num 0, Instead of HT Link topology @@ -125,6 +125,6 @@ chip northbridge/amd/agesa/family15/root_complex device pci 18.4 on end device pci 18.5 on end #f15 end #chip northbridge/amd/agesa/family15 # CPU side of HT root complex - end #pci_domain + end #domain end #northbridge/amd/agesa/family15/root_complex diff --git a/src/mainboard/supermicro/h8qme_fam10/devicetree.cb b/src/mainboard/supermicro/h8qme_fam10/devicetree.cb index 56ba7b5395..d797beaba3 100644 --- a/src/mainboard/supermicro/h8qme_fam10/devicetree.cb +++ b/src/mainboard/supermicro/h8qme_fam10/devicetree.cb @@ -4,7 +4,7 @@ chip northbridge/amd/amdfam10/root_complex # Root complex device lapic 0 on end # Local APIC of the CPU end end - device pci_domain 0 on # PCI domain + device domain 0 on # PCI domain subsystemid 0x15d9 0x1511 inherit chip northbridge/amd/amdfam10 # Northbridge / RAM controller device pci 18.0 on end diff --git a/src/mainboard/supermicro/h8scm/devicetree.cb b/src/mainboard/supermicro/h8scm/devicetree.cb index 5ade0af64c..6367392a82 100644 --- a/src/mainboard/supermicro/h8scm/devicetree.cb +++ b/src/mainboard/supermicro/h8scm/devicetree.cb @@ -22,7 +22,7 @@ chip northbridge/amd/agesa/family15/root_complex device lapic 0x10 on end end end - device pci_domain 0 on + device domain 0 on subsystemid 0x15d9 0xab11 inherit #Supermicro chip northbridge/amd/agesa/family15 # CPU side of HT root complex device pci 18.0 on # Put IO-HUB at link_num 0, Instead of HT Link topology @@ -122,6 +122,6 @@ chip northbridge/amd/agesa/family15/root_complex device pci 18.4 on end device pci 18.5 on end #f15 end #chip northbridge/amd/agesa/family15 # CPU side of HT root complex - end #pci_domain + end #domain end #northbridge/amd/agesa/family15/root_complex diff --git a/src/mainboard/supermicro/h8scm_fam10/devicetree.cb b/src/mainboard/supermicro/h8scm_fam10/devicetree.cb index 9aa4406faf..eb7ae1b0f7 100644 --- a/src/mainboard/supermicro/h8scm_fam10/devicetree.cb +++ b/src/mainboard/supermicro/h8scm_fam10/devicetree.cb @@ -9,7 +9,7 @@ chip northbridge/amd/amdfam10/root_complex device lapic 0 on end end end - device pci_domain 0 on + device domain 0 on subsystemid 0x15d9 0x1511 inherit chip northbridge/amd/amdfam10 ##device pci 18.0 on end @@ -104,9 +104,9 @@ chip northbridge/amd/amdfam10/root_complex device pci 19.3 on end device pci 19.4 on end end - end #pci_domain + end #domain #for node 32 to node 63 -# device pci_domain 0 on +# device domain 0 on # chip northbridge/amd/amdfam10 # device pci 00.0 on end# northbridge # device pci 00.0 on end @@ -118,7 +118,7 @@ chip northbridge/amd/amdfam10/root_complex # device pci 00.4 on end # device pci 00.5 on end # end -# end #pci_domain +# end #domain # chip drivers/generic/debug # device pnp 0.0 off end # chip name diff --git a/src/mainboard/supermicro/x6dai_g/devicetree.cb b/src/mainboard/supermicro/x6dai_g/devicetree.cb index e6201a811e..f39ca6cc91 100644 --- a/src/mainboard/supermicro/x6dai_g/devicetree.cb +++ b/src/mainboard/supermicro/x6dai_g/devicetree.cb @@ -1,5 +1,5 @@ chip northbridge/intel/e7525 # mch - device pci_domain 0 on + device domain 0 on subsystemid 0x15d9 0x6780 inherit chip southbridge/intel/esb6300 # esb6300 register "pirq_a_d" = "0x0b0a0a05" diff --git a/src/mainboard/supermicro/x6dhe_g/devicetree.cb b/src/mainboard/supermicro/x6dhe_g/devicetree.cb index 08c0751c00..dfe2e8836d 100644 --- a/src/mainboard/supermicro/x6dhe_g/devicetree.cb +++ b/src/mainboard/supermicro/x6dhe_g/devicetree.cb @@ -5,7 +5,7 @@ chip northbridge/intel/e7520 # MCH device pnp 00.2 off end device pnp 00.3 off end end - device pci_domain 0 on + device domain 0 on subsystemid 0x15d9 0x6080 inherit chip southbridge/intel/esb6300 # ESB6300 register "pirq_a_d" = "0x0b070a05" diff --git a/src/mainboard/supermicro/x6dhe_g2/devicetree.cb b/src/mainboard/supermicro/x6dhe_g2/devicetree.cb index ecfe0a00a3..c074fe8c1f 100644 --- a/src/mainboard/supermicro/x6dhe_g2/devicetree.cb +++ b/src/mainboard/supermicro/x6dhe_g2/devicetree.cb @@ -5,7 +5,7 @@ chip northbridge/intel/e7520 # MCH device pnp 00.2 off end device pnp 00.3 off end end - device pci_domain 0 on + device domain 0 on subsystemid 0x15d9 0x6080 inherit chip southbridge/intel/i82801ex # ICH5R register "pirq_a_d" = "0x0b070a05" diff --git a/src/mainboard/supermicro/x6dhr_ig/devicetree.cb b/src/mainboard/supermicro/x6dhr_ig/devicetree.cb index 6ada3b1341..1b54204ac8 100644 --- a/src/mainboard/supermicro/x6dhr_ig/devicetree.cb +++ b/src/mainboard/supermicro/x6dhr_ig/devicetree.cb @@ -1,5 +1,5 @@ chip northbridge/intel/e7520 # mch - device pci_domain 0 on + device domain 0 on subsystemid 0x15d9 0x5580 inherit chip southbridge/intel/i82801ex # i82801er # USB ports diff --git a/src/mainboard/supermicro/x6dhr_ig2/devicetree.cb b/src/mainboard/supermicro/x6dhr_ig2/devicetree.cb index 3d9b644fd9..1ec6639268 100644 --- a/src/mainboard/supermicro/x6dhr_ig2/devicetree.cb +++ b/src/mainboard/supermicro/x6dhr_ig2/devicetree.cb @@ -1,5 +1,5 @@ chip northbridge/intel/e7520 # mch - device pci_domain 0 on + device domain 0 on subsystemid 0x15d9 0x5580 inherit chip southbridge/intel/i82801ex # i82801er # USB ports diff --git a/src/mainboard/supermicro/x7db8/devicetree.cb b/src/mainboard/supermicro/x7db8/devicetree.cb index 8949c54806..0a3fabb2fb 100644 --- a/src/mainboard/supermicro/x7db8/devicetree.cb +++ b/src/mainboard/supermicro/x7db8/devicetree.cb @@ -28,7 +28,7 @@ chip northbridge/intel/i5000 end end - device pci_domain 0 on + device domain 0 on device pci 00.0 on # Host bridge subsystemid 0x15d9 0x2017 end diff --git a/src/mainboard/technexion/tim5690/devicetree.cb b/src/mainboard/technexion/tim5690/devicetree.cb index 148a4ab469..2cc73e1714 100644 --- a/src/mainboard/technexion/tim5690/devicetree.cb +++ b/src/mainboard/technexion/tim5690/devicetree.cb @@ -14,7 +14,7 @@ chip northbridge/amd/amdk8/root_complex device lapic 0 on end end end - device pci_domain 0 on + device domain 0 on subsystemid 0x1022 0x3050 inherit chip northbridge/amd/amdk8 device pci 18.0 on # southbridge @@ -108,6 +108,6 @@ chip northbridge/amd/amdk8/root_complex device pci 18.2 on end device pci 18.3 on end end #northbridge/amd/amdk8 - end #pci_domain + end #domain end #northbridge/amd/amdk8/root_complex diff --git a/src/mainboard/technexion/tim8690/devicetree.cb b/src/mainboard/technexion/tim8690/devicetree.cb index e1f8936bad..ee69a49562 100644 --- a/src/mainboard/technexion/tim8690/devicetree.cb +++ b/src/mainboard/technexion/tim8690/devicetree.cb @@ -14,7 +14,7 @@ chip northbridge/amd/amdk8/root_complex device lapic 0 on end end end - device pci_domain 0 on + device domain 0 on subsystemid 0x1022 0x3050 inherit chip northbridge/amd/amdk8 device pci 18.0 on # southbridge @@ -111,6 +111,6 @@ chip northbridge/amd/amdk8/root_complex device pci 18.2 on end device pci 18.3 on end end #northbridge/amd/amdk8 - end #pci_domain + end #domain end #northbridge/amd/amdk8/root_complex diff --git a/src/mainboard/technologic/ts5300/devicetree.cb b/src/mainboard/technologic/ts5300/devicetree.cb index 9fddf734dd..6c83e208ab 100644 --- a/src/mainboard/technologic/ts5300/devicetree.cb +++ b/src/mainboard/technologic/ts5300/devicetree.cb @@ -1,5 +1,5 @@ chip cpu/amd/sc520 - device pci_domain 0 on + device domain 0 on device pci 0.0 on end end diff --git a/src/mainboard/televideo/tc7020/devicetree.cb b/src/mainboard/televideo/tc7020/devicetree.cb index 10188a35c2..d1fa6bd271 100644 --- a/src/mainboard/televideo/tc7020/devicetree.cb +++ b/src/mainboard/televideo/tc7020/devicetree.cb @@ -1,5 +1,5 @@ chip northbridge/amd/gx1 # Northbridge - device pci_domain 0 on # PCI domain + device domain 0 on # PCI domain device pci 0.0 on end # Host bridge chip southbridge/amd/cs5530 # Southbridge device pci 12.0 on # ISA bridge diff --git a/src/mainboard/thomson/ip1000/devicetree.cb b/src/mainboard/thomson/ip1000/devicetree.cb index f7b11f1248..c1733303fa 100644 --- a/src/mainboard/thomson/ip1000/devicetree.cb +++ b/src/mainboard/thomson/ip1000/devicetree.cb @@ -5,7 +5,7 @@ chip northbridge/intel/i82830 # Northbridge end end - device pci_domain 0 on # PCI domain + device domain 0 on # PCI domain device pci 0.0 on end # Host bridge device pci 2.0 on end # VGA (Intel 82830 CGC) chip southbridge/intel/i82801dx # Southbridge diff --git a/src/mainboard/traverse/geos/devicetree.cb b/src/mainboard/traverse/geos/devicetree.cb index 44b36f68c2..ef14c3e09b 100644 --- a/src/mainboard/traverse/geos/devicetree.cb +++ b/src/mainboard/traverse/geos/devicetree.cb @@ -1,5 +1,5 @@ chip northbridge/amd/lx - device pci_domain 0 on + device domain 0 on device pci 1.0 on end # Northbridge device pci 1.1 on end # Graphics chip southbridge/amd/cs5536 diff --git a/src/mainboard/tyan/s1846/devicetree.cb b/src/mainboard/tyan/s1846/devicetree.cb index d3df17c7bb..16b3e7c214 100644 --- a/src/mainboard/tyan/s1846/devicetree.cb +++ b/src/mainboard/tyan/s1846/devicetree.cb @@ -4,7 +4,7 @@ chip northbridge/intel/i440bx # Northbridge device lapic 0 on end # APIC end end - device pci_domain 0 on # PCI domain + device domain 0 on # PCI domain device pci 0.0 on end # Host bridge device pci 1.0 on end # PCI/AGP bridge chip southbridge/intel/i82371eb # Southbridge diff --git a/src/mainboard/tyan/s2735/devicetree.cb b/src/mainboard/tyan/s2735/devicetree.cb index c0557f8d18..726a5d2c76 100644 --- a/src/mainboard/tyan/s2735/devicetree.cb +++ b/src/mainboard/tyan/s2735/devicetree.cb @@ -1,5 +1,5 @@ chip northbridge/intel/e7501 - device pci_domain 0 on + device domain 0 on subsystemid 0x10f1 0x2735 inherit device pci 0.0 on end device pci 0.1 on end @@ -73,7 +73,7 @@ chip northbridge/intel/e7501 device pci 1f.5 off end device pci 1f.6 off end end # SB - end # PCI_DOMAIN + end # PCI domain device lapic_cluster 0 on chip cpu/intel/socket_mPGA604 device lapic 0 on end diff --git a/src/mainboard/tyan/s2850/devicetree.cb b/src/mainboard/tyan/s2850/devicetree.cb index 4e981ad0d7..bff001305d 100644 --- a/src/mainboard/tyan/s2850/devicetree.cb +++ b/src/mainboard/tyan/s2850/devicetree.cb @@ -4,7 +4,7 @@ chip northbridge/amd/amdk8/root_complex device lapic 0 on end end end - device pci_domain 0 on + device domain 0 on subsystemid 0x10f1 0x2850 inherit chip northbridge/amd/amdk8 device pci 18.0 on # LDT0 diff --git a/src/mainboard/tyan/s2875/devicetree.cb b/src/mainboard/tyan/s2875/devicetree.cb index d3d6c6d14e..f7f7a9e6e3 100644 --- a/src/mainboard/tyan/s2875/devicetree.cb +++ b/src/mainboard/tyan/s2875/devicetree.cb @@ -4,7 +4,7 @@ chip northbridge/amd/amdk8/root_complex device lapic 0 on end end end - device pci_domain 0 on + device domain 0 on subsystemid 0x10f1 0x2875 inherit chip northbridge/amd/amdk8 device pci 18.0 on # northbridge diff --git a/src/mainboard/tyan/s2880/devicetree.cb b/src/mainboard/tyan/s2880/devicetree.cb index b815fb5f1b..2aa0796877 100644 --- a/src/mainboard/tyan/s2880/devicetree.cb +++ b/src/mainboard/tyan/s2880/devicetree.cb @@ -4,7 +4,7 @@ chip northbridge/amd/amdk8/root_complex device lapic 0 on end end end - device pci_domain 0 on + device domain 0 on subsystemid 0x10f1 0x2880 inherit chip northbridge/amd/amdk8 device pci 18.0 on # northbridge diff --git a/src/mainboard/tyan/s2881/devicetree.cb b/src/mainboard/tyan/s2881/devicetree.cb index 7e836ffe56..463c553982 100644 --- a/src/mainboard/tyan/s2881/devicetree.cb +++ b/src/mainboard/tyan/s2881/devicetree.cb @@ -4,7 +4,7 @@ chip northbridge/amd/amdk8/root_complex device lapic 0 on end end end - device pci_domain 0 on + device domain 0 on subsystemid 0x10f1 0x2881 inherit chip northbridge/amd/amdk8 device pci 18.0 on end # link 0 diff --git a/src/mainboard/tyan/s2882/devicetree.cb b/src/mainboard/tyan/s2882/devicetree.cb index 4f10752d8c..0726d08c49 100644 --- a/src/mainboard/tyan/s2882/devicetree.cb +++ b/src/mainboard/tyan/s2882/devicetree.cb @@ -5,7 +5,7 @@ chip northbridge/amd/amdk8/root_complex end end - device pci_domain 0 on + device domain 0 on subsystemid 0x10f1 0x2882 inherit chip northbridge/amd/amdk8 device pci 18.0 on # northbridge @@ -121,6 +121,6 @@ chip northbridge/amd/amdk8/root_complex device pci 18.2 on end device pci 18.3 on end end # NB - end #pci_domain + end #domain end diff --git a/src/mainboard/tyan/s2885/devicetree.cb b/src/mainboard/tyan/s2885/devicetree.cb index fbb96807d6..b677fbc2e9 100644 --- a/src/mainboard/tyan/s2885/devicetree.cb +++ b/src/mainboard/tyan/s2885/devicetree.cb @@ -4,7 +4,7 @@ chip northbridge/amd/amdk8/root_complex device lapic 0 on end end end - device pci_domain 0 on + device domain 0 on subsystemid 0x10f1 0x2885 inherit chip northbridge/amd/amdk8 device pci 18.0 on # LDT0 @@ -118,7 +118,7 @@ chip northbridge/amd/amdk8/root_complex device pci 18.3 on end end - end #pci_domain + end #domain # chip drivers/generic/debug # device pnp 0.0 off end diff --git a/src/mainboard/tyan/s2891/devicetree.cb b/src/mainboard/tyan/s2891/devicetree.cb index d793640587..7517e4d774 100644 --- a/src/mainboard/tyan/s2891/devicetree.cb +++ b/src/mainboard/tyan/s2891/devicetree.cb @@ -4,7 +4,7 @@ chip northbridge/amd/amdk8/root_complex # Root complex device lapic 0 on end # Local APIC of the CPU end end - device pci_domain 0 on # PCI domain + device domain 0 on # PCI domain subsystemid 0x10f1 0x2891 inherit chip northbridge/amd/amdk8 # Northbridge / RAM controller device pci 18.0 on # Link 0 == LDT 0 diff --git a/src/mainboard/tyan/s2892/devicetree.cb b/src/mainboard/tyan/s2892/devicetree.cb index 3b999ca42e..a5cef447ef 100644 --- a/src/mainboard/tyan/s2892/devicetree.cb +++ b/src/mainboard/tyan/s2892/devicetree.cb @@ -4,7 +4,7 @@ chip northbridge/amd/amdk8/root_complex # Root complex device lapic 0 on end # Local APIC of the CPU end end - device pci_domain 0 on # PCI domain + device domain 0 on # PCI domain subsystemid 0x10f1 0x2892 inherit chip northbridge/amd/amdk8 # Northbridge / RAM controller device pci 18.0 on # Link 0 == LDT 0 diff --git a/src/mainboard/tyan/s2895/devicetree.cb b/src/mainboard/tyan/s2895/devicetree.cb index 7d7abc3dd1..f60d5c6658 100644 --- a/src/mainboard/tyan/s2895/devicetree.cb +++ b/src/mainboard/tyan/s2895/devicetree.cb @@ -4,7 +4,7 @@ chip northbridge/amd/amdk8/root_complex # Root complex device lapic 0 on end # Local APIC of the CPU end end - device pci_domain 0 on # PCI domain + device domain 0 on # PCI domain subsystemid 0x10f1 0x2895 inherit chip northbridge/amd/amdk8 # Northbridge / RAM controller device pci 18.0 on # Link 0 == LDT 0 diff --git a/src/mainboard/tyan/s2912/devicetree.cb b/src/mainboard/tyan/s2912/devicetree.cb index 0ce4a4895b..276e12f01e 100644 --- a/src/mainboard/tyan/s2912/devicetree.cb +++ b/src/mainboard/tyan/s2912/devicetree.cb @@ -4,7 +4,7 @@ chip northbridge/amd/amdk8/root_complex # Root complex device lapic 0 on end # Local APIC of the CPU end end - device pci_domain 0 on # PCI domain + device domain 0 on # PCI domain subsystemid 0x10f1 0x2912 inherit chip northbridge/amd/amdk8 # Northbridge / RAM controller device pci 18.0 on end diff --git a/src/mainboard/tyan/s2912_fam10/devicetree.cb b/src/mainboard/tyan/s2912_fam10/devicetree.cb index 43bdeb63de..851da920f1 100644 --- a/src/mainboard/tyan/s2912_fam10/devicetree.cb +++ b/src/mainboard/tyan/s2912_fam10/devicetree.cb @@ -4,7 +4,7 @@ chip northbridge/amd/amdfam10/root_complex # Root complex device lapic 0 on end # Local APIC of the CPU end end - device pci_domain 0 on # PCI domain + device domain 0 on # PCI domain subsystemid 0x10f1 0x2912 inherit chip northbridge/amd/amdfam10 # Northbridge / RAM controller device pci 18.0 on end diff --git a/src/mainboard/tyan/s4880/devicetree.cb b/src/mainboard/tyan/s4880/devicetree.cb index e1aa23a35e..37470d8299 100644 --- a/src/mainboard/tyan/s4880/devicetree.cb +++ b/src/mainboard/tyan/s4880/devicetree.cb @@ -5,7 +5,7 @@ chip northbridge/amd/amdk8/root_complex end end - device pci_domain 0 on + device domain 0 on subsystemid 0x10f1 0x4880 inherit chip northbridge/amd/amdk8 device pci 18.0 on end # LDT0 @@ -94,6 +94,6 @@ chip northbridge/amd/amdk8/root_complex device pci 18.3 on end end - end #pci_domain + end #domain end diff --git a/src/mainboard/tyan/s4882/devicetree.cb b/src/mainboard/tyan/s4882/devicetree.cb index 767def9ac5..eaf2e57b08 100644 --- a/src/mainboard/tyan/s4882/devicetree.cb +++ b/src/mainboard/tyan/s4882/devicetree.cb @@ -4,7 +4,7 @@ chip northbridge/amd/amdk8/root_complex device lapic 0 on end end end - device pci_domain 0 on + device domain 0 on subsystemid 0x10f1 0x4882 inherit chip northbridge/amd/amdk8 device pci 18.0 on end # LDT0 diff --git a/src/mainboard/tyan/s8226/devicetree.cb b/src/mainboard/tyan/s8226/devicetree.cb index a057f027e7..ce367a83de 100644 --- a/src/mainboard/tyan/s8226/devicetree.cb +++ b/src/mainboard/tyan/s8226/devicetree.cb @@ -22,7 +22,7 @@ chip northbridge/amd/agesa/family15/root_complex device lapic 0x10 on end end end - device pci_domain 0 on + device domain 0 on subsystemid 0x15d9 0xab11 inherit #Tyan chip northbridge/amd/agesa/family15 # CPU side of HT root complex device pci 18.0 on # Put IO-HUB at link_num 0, Instead of HT Link topology @@ -122,6 +122,6 @@ chip northbridge/amd/agesa/family15/root_complex device pci 18.4 on end device pci 18.5 on end #f15 end #chip northbridge/amd/agesa/family15 # CPU side of HT root complex - end #pci_domain + end #domain end #northbridge/amd/agesa/family15/root_complex diff --git a/src/mainboard/via/epia-cn/devicetree.cb b/src/mainboard/via/epia-cn/devicetree.cb index 96a2222d5f..041bc408f9 100644 --- a/src/mainboard/via/epia-cn/devicetree.cb +++ b/src/mainboard/via/epia-cn/devicetree.cb @@ -1,5 +1,5 @@ chip northbridge/via/cn700 # Northbridge - device pci_domain 0 on # PCI domain + device domain 0 on # PCI domain device pci 0.0 on end # AGP Bridge device pci 0.1 on end # Error Reporting device pci 0.2 on end # Host Bus Control diff --git a/src/mainboard/via/epia-m/devicetree.cb b/src/mainboard/via/epia-m/devicetree.cb index 3db72eefdb..eae67c36fa 100644 --- a/src/mainboard/via/epia-m/devicetree.cb +++ b/src/mainboard/via/epia-m/devicetree.cb @@ -6,7 +6,7 @@ chip northbridge/via/vt8623 end end - device pci_domain 0 on + device domain 0 on device pci 0.0 on end device pci 1.0 on end diff --git a/src/mainboard/via/epia-m700/devicetree.cb b/src/mainboard/via/epia-m700/devicetree.cb index a687f09602..55c7cdf285 100644 --- a/src/mainboard/via/epia-m700/devicetree.cb +++ b/src/mainboard/via/epia-m700/devicetree.cb @@ -1,5 +1,5 @@ chip northbridge/via/vx800 # Northbridge - device pci_domain 0 on + device domain 0 on device pci 0.0 on end # AGP Bridge device pci 0.1 on end # Error Reporting device pci 0.2 on end # Host Bus Control diff --git a/src/mainboard/via/epia-n/devicetree.cb b/src/mainboard/via/epia-n/devicetree.cb index 3505374aa3..d0117ef5e9 100644 --- a/src/mainboard/via/epia-n/devicetree.cb +++ b/src/mainboard/via/epia-n/devicetree.cb @@ -27,7 +27,7 @@ chip northbridge/via/cn400 # Northbridge end end - device pci_domain 0 on # PCI domain + device domain 0 on # PCI domain device pci 0.0 on end # AGP Bridge device pci 0.1 on end # Error Reporting device pci 0.2 on end # Host Bus Control diff --git a/src/mainboard/via/epia/devicetree.cb b/src/mainboard/via/epia/devicetree.cb index c906074a0f..b0acb3a598 100644 --- a/src/mainboard/via/epia/devicetree.cb +++ b/src/mainboard/via/epia/devicetree.cb @@ -1,5 +1,5 @@ chip northbridge/via/vt8601 - device pci_domain 0 on + device domain 0 on device pci 0.0 on end # Northbridge # device pci 0.1 on # AGP bridge # device pci 0.0 on end # Integrated VGA diff --git a/src/mainboard/via/pc2500e/devicetree.cb b/src/mainboard/via/pc2500e/devicetree.cb index bb3ddcc96c..34a673b6d3 100644 --- a/src/mainboard/via/pc2500e/devicetree.cb +++ b/src/mainboard/via/pc2500e/devicetree.cb @@ -1,5 +1,5 @@ chip northbridge/via/cn700 # Northbridge - device pci_domain 0 on # PCI domain + device domain 0 on # PCI domain subsystemid 0x1019 0xaa51 inherit device pci 0.0 on end # AGP Bridge device pci 0.1 on end # Error Reporting diff --git a/src/mainboard/via/vt8454c/devicetree.cb b/src/mainboard/via/vt8454c/devicetree.cb index ab09071a15..5268b17dd9 100644 --- a/src/mainboard/via/vt8454c/devicetree.cb +++ b/src/mainboard/via/vt8454c/devicetree.cb @@ -4,7 +4,7 @@ chip northbridge/via/cx700 device lapic 0 on end end end - device pci_domain 0 on + device domain 0 on device pci 0.0 on end # AGP Bridge device pci 0.1 on end # Error Reporting device pci 0.2 on end # Host Bus Control diff --git a/src/mainboard/winent/pl6064/devicetree.cb b/src/mainboard/winent/pl6064/devicetree.cb index 82fd21ee47..8682109092 100644 --- a/src/mainboard/winent/pl6064/devicetree.cb +++ b/src/mainboard/winent/pl6064/devicetree.cb @@ -1,5 +1,5 @@ chip northbridge/amd/lx - device pci_domain 0 on + device domain 0 on device pci 1.0 on end # Northbridge device pci 1.1 on end # Graphics chip southbridge/amd/cs5536 diff --git a/src/mainboard/wyse/s50/devicetree.cb b/src/mainboard/wyse/s50/devicetree.cb index cb30e43969..9055ef666d 100644 --- a/src/mainboard/wyse/s50/devicetree.cb +++ b/src/mainboard/wyse/s50/devicetree.cb @@ -20,7 +20,7 @@ ## chip northbridge/amd/gx2 - device pci_domain 0 on + device domain 0 on device pci 1.0 on end # Geode GX2 Host Bridge device pci 1.1 on end # Geode GX2 Graphics Processor chip southbridge/amd/cs5536 diff --git a/src/northbridge/amd/agesa/family10/northbridge.c b/src/northbridge/amd/agesa/family10/northbridge.c index c5d570a3e7..59a12f174f 100644 --- a/src/northbridge/amd/agesa/family10/northbridge.c +++ b/src/northbridge/amd/agesa/family10/northbridge.c @@ -1244,7 +1244,7 @@ static u32 cpu_bus_scan(device_t dev, u32 max) if (dev_mc && dev_mc->bus) { printk(BIOS_DEBUG, "%s found", dev_path(dev_mc)); pci_domain = dev_mc->bus->dev; - if (pci_domain && (pci_domain->path.type == DEVICE_PATH_PCI_DOMAIN)) { + if (pci_domain && (pci_domain->path.type == DEVICE_PATH_DOMAIN)) { printk(BIOS_DEBUG, "\n%s move to ",dev_path(dev_mc)); dev_mc->bus->secondary = CONFIG_CBB; // move to 0xff printk(BIOS_DEBUG, "%s",dev_path(dev_mc)); @@ -1260,7 +1260,7 @@ static u32 cpu_bus_scan(device_t dev, u32 max) if (dev_mc && dev_mc->bus) { printk(BIOS_DEBUG, "%s found\n", dev_path(dev_mc)); pci_domain = dev_mc->bus->dev; - if (pci_domain && (pci_domain->path.type == DEVICE_PATH_PCI_DOMAIN)) { + if (pci_domain && (pci_domain->path.type == DEVICE_PATH_DOMAIN)) { if ((pci_domain->link_list) && (pci_domain->link_list->children == dev_mc)) { printk(BIOS_DEBUG, "%s move to ",dev_path(dev_mc)); dev_mc->bus->secondary = CONFIG_CBB; // move to 0xff @@ -1446,7 +1446,7 @@ static void root_complex_enable_dev(struct device *dev) } /* Set the operations if it is a special bus type */ - if (dev->path.type == DEVICE_PATH_PCI_DOMAIN) { + if (dev->path.type == DEVICE_PATH_DOMAIN) { dev->ops = &pci_domain_ops; } else if (dev->path.type == DEVICE_PATH_APIC_CLUSTER) { diff --git a/src/northbridge/amd/agesa/family12/northbridge.c b/src/northbridge/amd/agesa/family12/northbridge.c index 9c598e85a1..e860594b66 100644 --- a/src/northbridge/amd/agesa/family12/northbridge.c +++ b/src/northbridge/amd/agesa/family12/northbridge.c @@ -921,7 +921,7 @@ static void root_complex_enable_dev(struct device *dev) } /* Set the operations if it is a special bus type */ - if (dev->path.type == DEVICE_PATH_PCI_DOMAIN) { + if (dev->path.type == DEVICE_PATH_DOMAIN) { dev->ops = &pci_domain_ops; } else if (dev->path.type == DEVICE_PATH_APIC_CLUSTER) { diff --git a/src/northbridge/amd/agesa/family14/northbridge.c b/src/northbridge/amd/agesa/family14/northbridge.c index 3d0b97f608..d955bcf666 100644 --- a/src/northbridge/amd/agesa/family14/northbridge.c +++ b/src/northbridge/amd/agesa/family14/northbridge.c @@ -345,7 +345,7 @@ static void nb_read_resources(device_t dev) } /* - * This MMCONF resource must be reserved in the PCI_DOMAIN. + * This MMCONF resource must be reserved in the PCI domain. * It is not honored by the coreboot resource allocator if it is in * the APIC_CLUSTER. */ @@ -908,7 +908,7 @@ static void root_complex_enable_dev(struct device *dev) } /* Set the operations if it is a special bus type */ - if (dev->path.type == DEVICE_PATH_PCI_DOMAIN) { + if (dev->path.type == DEVICE_PATH_DOMAIN) { dev->ops = &pci_domain_ops; } else if (dev->path.type == DEVICE_PATH_APIC_CLUSTER) { dev->ops = &cpu_bus_ops; diff --git a/src/northbridge/amd/agesa/family15/northbridge.c b/src/northbridge/amd/agesa/family15/northbridge.c index 1ac7e616f6..769d473c85 100644 --- a/src/northbridge/amd/agesa/family15/northbridge.c +++ b/src/northbridge/amd/agesa/family15/northbridge.c @@ -343,7 +343,7 @@ static void nb_read_resources(device_t dev) } /* - * This MMCONF resource must be reserved in the PCI_DOMAIN. + * This MMCONF resource must be reserved in the PCI domain. * It is not honored by the coreboot resource allocator if it is in * the APIC_CLUSTER. */ @@ -938,7 +938,7 @@ static u32 cpu_bus_scan(device_t dev, u32 max) if (dev_mc && dev_mc->bus) { printk(BIOS_DEBUG, "%s found", dev_path(dev_mc)); pci_domain = dev_mc->bus->dev; - if (pci_domain && (pci_domain->path.type == DEVICE_PATH_PCI_DOMAIN)) { + if (pci_domain && (pci_domain->path.type == DEVICE_PATH_DOMAIN)) { printk(BIOS_DEBUG, "\n%s move to ",dev_path(dev_mc)); dev_mc->bus->secondary = CONFIG_CBB; // move to 0xff printk(BIOS_DEBUG, "%s",dev_path(dev_mc)); @@ -953,7 +953,7 @@ static u32 cpu_bus_scan(device_t dev, u32 max) if (dev_mc && dev_mc->bus) { printk(BIOS_DEBUG, "%s found\n", dev_path(dev_mc)); pci_domain = dev_mc->bus->dev; - if (pci_domain && (pci_domain->path.type == DEVICE_PATH_PCI_DOMAIN)) { + if (pci_domain && (pci_domain->path.type == DEVICE_PATH_DOMAIN)) { if ((pci_domain->link_list) && (pci_domain->link_list->children == dev_mc)) { printk(BIOS_DEBUG, "%s move to ",dev_path(dev_mc)); dev_mc->bus->secondary = CONFIG_CBB; // move to 0xff @@ -1143,7 +1143,7 @@ static void root_complex_enable_dev(struct device *dev) } /* Set the operations if it is a special bus type */ - if (dev->path.type == DEVICE_PATH_PCI_DOMAIN) { + if (dev->path.type == DEVICE_PATH_DOMAIN) { dev->ops = &pci_domain_ops; } else if (dev->path.type == DEVICE_PATH_APIC_CLUSTER) { dev->ops = &cpu_bus_ops; diff --git a/src/northbridge/amd/agesa/family15tn/northbridge.c b/src/northbridge/amd/agesa/family15tn/northbridge.c index 2ff5c1a9b5..41c2d8e506 100644 --- a/src/northbridge/amd/agesa/family15tn/northbridge.c +++ b/src/northbridge/amd/agesa/family15tn/northbridge.c @@ -339,7 +339,7 @@ static void nb_read_resources(device_t dev) } /* - * This MMCONF resource must be reserved in the PCI_DOMAIN. + * This MMCONF resource must be reserved in the PCI domain. * It is not honored by the coreboot resource allocator if it is in * the APIC_CLUSTER. */ @@ -922,7 +922,7 @@ static u32 cpu_bus_scan(device_t dev, u32 max) if (dev_mc && dev_mc->bus) { printk(BIOS_DEBUG, "%s found", dev_path(dev_mc)); pci_domain = dev_mc->bus->dev; - if (pci_domain && (pci_domain->path.type == DEVICE_PATH_PCI_DOMAIN)) { + if (pci_domain && (pci_domain->path.type == DEVICE_PATH_DOMAIN)) { printk(BIOS_DEBUG, "\n%s move to ",dev_path(dev_mc)); dev_mc->bus->secondary = CONFIG_CBB; // move to 0xff printk(BIOS_DEBUG, "%s",dev_path(dev_mc)); @@ -937,7 +937,7 @@ static u32 cpu_bus_scan(device_t dev, u32 max) if (dev_mc && dev_mc->bus) { printk(BIOS_DEBUG, "%s found\n", dev_path(dev_mc)); pci_domain = dev_mc->bus->dev; - if (pci_domain && (pci_domain->path.type == DEVICE_PATH_PCI_DOMAIN)) { + if (pci_domain && (pci_domain->path.type == DEVICE_PATH_DOMAIN)) { if ((pci_domain->link_list) && (pci_domain->link_list->children == dev_mc)) { printk(BIOS_DEBUG, "%s move to ",dev_path(dev_mc)); dev_mc->bus->secondary = CONFIG_CBB; // move to 0xff @@ -1123,7 +1123,7 @@ static void root_complex_enable_dev(struct device *dev) } /* Set the operations if it is a special bus type */ - if (dev->path.type == DEVICE_PATH_PCI_DOMAIN) { + if (dev->path.type == DEVICE_PATH_DOMAIN) { dev->ops = &pci_domain_ops; } else if (dev->path.type == DEVICE_PATH_APIC_CLUSTER) { dev->ops = &cpu_bus_ops; diff --git a/src/northbridge/amd/amdfam10/northbridge.c b/src/northbridge/amd/amdfam10/northbridge.c index 77dd138940..3b1e1f50ab 100644 --- a/src/northbridge/amd/amdfam10/northbridge.c +++ b/src/northbridge/amd/amdfam10/northbridge.c @@ -1280,7 +1280,7 @@ static u32 cpu_bus_scan(device_t dev, u32 max) if(dev_mc && dev_mc->bus) { printk(BIOS_DEBUG, "%s found", dev_path(dev_mc)); pci_domain = dev_mc->bus->dev; - if(pci_domain && (pci_domain->path.type == DEVICE_PATH_PCI_DOMAIN)) { + if(pci_domain && (pci_domain->path.type == DEVICE_PATH_DOMAIN)) { printk(BIOS_DEBUG, "\n%s move to ",dev_path(dev_mc)); dev_mc->bus->secondary = CONFIG_CBB; // move to 0xff printk(BIOS_DEBUG, "%s",dev_path(dev_mc)); @@ -1296,7 +1296,7 @@ static u32 cpu_bus_scan(device_t dev, u32 max) if (dev_mc && dev_mc->bus) { printk(BIOS_DEBUG, "%s found\n", dev_path(dev_mc)); pci_domain = dev_mc->bus->dev; - if(pci_domain && (pci_domain->path.type == DEVICE_PATH_PCI_DOMAIN)) { + if(pci_domain && (pci_domain->path.type == DEVICE_PATH_DOMAIN)) { if((pci_domain->link_list) && (pci_domain->link_list->children == dev_mc)) { printk(BIOS_DEBUG, "%s move to ",dev_path(dev_mc)); dev_mc->bus->secondary = CONFIG_CBB; // move to 0xff @@ -1469,7 +1469,7 @@ static void root_complex_enable_dev(struct device *dev) } /* Set the operations if it is a special bus type */ - if (dev->path.type == DEVICE_PATH_PCI_DOMAIN) { + if (dev->path.type == DEVICE_PATH_DOMAIN) { dev->ops = &pci_domain_ops; } else if (dev->path.type == DEVICE_PATH_APIC_CLUSTER) { diff --git a/src/northbridge/amd/amdk8/northbridge.c b/src/northbridge/amd/amdk8/northbridge.c index 2f3d778492..c5859f0031 100644 --- a/src/northbridge/amd/amdk8/northbridge.c +++ b/src/northbridge/amd/amdk8/northbridge.c @@ -1355,7 +1355,7 @@ static void root_complex_enable_dev(struct device *dev) } /* Set the operations if it is a special bus type */ - if (dev->path.type == DEVICE_PATH_PCI_DOMAIN) { + if (dev->path.type == DEVICE_PATH_DOMAIN) { dev->ops = &pci_domain_ops; } else if (dev->path.type == DEVICE_PATH_APIC_CLUSTER) { diff --git a/src/northbridge/amd/gx1/northbridge.c b/src/northbridge/amd/gx1/northbridge.c index 83b84e3734..8df0427f75 100644 --- a/src/northbridge/amd/gx1/northbridge.c +++ b/src/northbridge/amd/gx1/northbridge.c @@ -154,8 +154,8 @@ static void enable_dev(struct device *dev) { printk(BIOS_SPEW, "%s:%s()\n", NORTHBRIDGE_FILE, __func__); /* Set the operations if it is a special bus type */ - if (dev->path.type == DEVICE_PATH_PCI_DOMAIN) { - printk(BIOS_SPEW, "DEVICE_PATH_PCI_DOMAIN\n"); + if (dev->path.type == DEVICE_PATH_DOMAIN) { + printk(BIOS_SPEW, "DEVICE_PATH_DOMAIN\n"); dev->ops = &pci_domain_ops; pci_set_method(dev); } diff --git a/src/northbridge/amd/gx2/northbridge.c b/src/northbridge/amd/gx2/northbridge.c index 80bcdf611a..8b8ef719e4 100644 --- a/src/northbridge/amd/gx2/northbridge.c +++ b/src/northbridge/amd/gx2/northbridge.c @@ -349,7 +349,7 @@ static void enable_dev(struct device *dev) __func__, dev->path.type); /* Set the operations if it is a special bus type */ - if (dev->path.type == DEVICE_PATH_PCI_DOMAIN) + if (dev->path.type == DEVICE_PATH_DOMAIN) dev->ops = &pci_domain_ops; else if (dev->path.type == DEVICE_PATH_APIC_CLUSTER) dev->ops = &cpu_bus_ops; diff --git a/src/northbridge/amd/lx/northbridge.c b/src/northbridge/amd/lx/northbridge.c index aaaf46b207..26b4884480 100644 --- a/src/northbridge/amd/lx/northbridge.c +++ b/src/northbridge/amd/lx/northbridge.c @@ -453,7 +453,7 @@ static void enable_dev(struct device *dev) __func__, dev->path.type); /* Set the operations if it is a special bus type */ - if (dev->path.type == DEVICE_PATH_PCI_DOMAIN) + if (dev->path.type == DEVICE_PATH_DOMAIN) dev->ops = &pci_domain_ops; else if (dev->path.type == DEVICE_PATH_APIC_CLUSTER) dev->ops = &cpu_bus_ops; diff --git a/src/northbridge/intel/e7501/northbridge.c b/src/northbridge/intel/e7501/northbridge.c index e7d7d5ddf5..60929aa036 100644 --- a/src/northbridge/intel/e7501/northbridge.c +++ b/src/northbridge/intel/e7501/northbridge.c @@ -125,7 +125,7 @@ static struct device_operations cpu_bus_ops = { static void enable_dev(struct device *dev) { /* Set the operations if it is a special bus type */ - if (dev->path.type == DEVICE_PATH_PCI_DOMAIN) { + if (dev->path.type == DEVICE_PATH_DOMAIN) { dev->ops = &pci_domain_ops; } else if (dev->path.type == DEVICE_PATH_APIC_CLUSTER) { diff --git a/src/northbridge/intel/e7505/northbridge.c b/src/northbridge/intel/e7505/northbridge.c index db0ece2519..00b8f5783b 100644 --- a/src/northbridge/intel/e7505/northbridge.c +++ b/src/northbridge/intel/e7505/northbridge.c @@ -137,7 +137,7 @@ static struct device_operations cpu_bus_ops = { static void enable_dev(struct device *dev) { /* Set the operations if it is a special bus type */ - if (dev->path.type == DEVICE_PATH_PCI_DOMAIN) { + if (dev->path.type == DEVICE_PATH_DOMAIN) { dev->ops = &pci_domain_ops; } else if (dev->path.type == DEVICE_PATH_APIC_CLUSTER) { diff --git a/src/northbridge/intel/e7520/northbridge.c b/src/northbridge/intel/e7520/northbridge.c index 962e8cdda2..536ceba598 100644 --- a/src/northbridge/intel/e7520/northbridge.c +++ b/src/northbridge/intel/e7520/northbridge.c @@ -200,7 +200,7 @@ static struct device_operations cpu_bus_ops = { static void enable_dev(device_t dev) { /* Set the operations if it is a special bus type */ - if (dev->path.type == DEVICE_PATH_PCI_DOMAIN) { + if (dev->path.type == DEVICE_PATH_DOMAIN) { dev->ops = &pci_domain_ops; } else if (dev->path.type == DEVICE_PATH_APIC_CLUSTER) { diff --git a/src/northbridge/intel/e7525/northbridge.c b/src/northbridge/intel/e7525/northbridge.c index ceb7afa7c1..f854913a5f 100644 --- a/src/northbridge/intel/e7525/northbridge.c +++ b/src/northbridge/intel/e7525/northbridge.c @@ -200,7 +200,7 @@ static struct device_operations cpu_bus_ops = { static void enable_dev(device_t dev) { /* Set the operations if it is a special bus type */ - if (dev->path.type == DEVICE_PATH_PCI_DOMAIN) { + if (dev->path.type == DEVICE_PATH_DOMAIN) { dev->ops = &pci_domain_ops; } else if (dev->path.type == DEVICE_PATH_APIC_CLUSTER) { diff --git a/src/northbridge/intel/gm45/northbridge.c b/src/northbridge/intel/gm45/northbridge.c index 1839ec63e0..e1e2b92e06 100644 --- a/src/northbridge/intel/gm45/northbridge.c +++ b/src/northbridge/intel/gm45/northbridge.c @@ -233,7 +233,7 @@ static struct device_operations cpu_bus_ops = { static void enable_dev(device_t dev) { /* Set the operations if it is a special bus type */ - if (dev->path.type == DEVICE_PATH_PCI_DOMAIN) { + if (dev->path.type == DEVICE_PATH_DOMAIN) { dev->ops = &pci_domain_ops; } else if (dev->path.type == DEVICE_PATH_APIC_CLUSTER) { dev->ops = &cpu_bus_ops; diff --git a/src/northbridge/intel/i3100/northbridge.c b/src/northbridge/intel/i3100/northbridge.c index d90d0b52e3..ee8d5364ba 100644 --- a/src/northbridge/intel/i3100/northbridge.c +++ b/src/northbridge/intel/i3100/northbridge.c @@ -221,7 +221,7 @@ static struct device_operations cpu_bus_ops = { static void enable_dev(device_t dev) { /* Set the operations if it is a special bus type */ - if (dev->path.type == DEVICE_PATH_PCI_DOMAIN) { + if (dev->path.type == DEVICE_PATH_DOMAIN) { dev->ops = &pci_domain_ops; } else if (dev->path.type == DEVICE_PATH_APIC_CLUSTER) { diff --git a/src/northbridge/intel/i440bx/northbridge.c b/src/northbridge/intel/i440bx/northbridge.c index ccd5e9cf69..5f8bd7b387 100644 --- a/src/northbridge/intel/i440bx/northbridge.c +++ b/src/northbridge/intel/i440bx/northbridge.c @@ -107,7 +107,7 @@ static struct device_operations cpu_bus_ops = { static void enable_dev(struct device *dev) { /* Set the operations if it is a special bus type */ - if (dev->path.type == DEVICE_PATH_PCI_DOMAIN) { + if (dev->path.type == DEVICE_PATH_DOMAIN) { dev->ops = &pci_domain_ops; pci_set_method(dev); } diff --git a/src/northbridge/intel/i440lx/northbridge.c b/src/northbridge/intel/i440lx/northbridge.c index c75a4bbe57..c2c50ce217 100644 --- a/src/northbridge/intel/i440lx/northbridge.c +++ b/src/northbridge/intel/i440lx/northbridge.c @@ -136,7 +136,7 @@ static struct device_operations cpu_bus_ops = { static void enable_dev(struct device *dev) { /* Set the operations if it is a special bus type */ - if (dev->path.type == DEVICE_PATH_PCI_DOMAIN) { + if (dev->path.type == DEVICE_PATH_DOMAIN) { dev->ops = &pci_domain_ops; pci_set_method(dev); } diff --git a/src/northbridge/intel/i5000/northbridge.c b/src/northbridge/intel/i5000/northbridge.c index 071616cf26..01d6945312 100644 --- a/src/northbridge/intel/i5000/northbridge.c +++ b/src/northbridge/intel/i5000/northbridge.c @@ -183,7 +183,7 @@ static struct device_operations pci_domain_ops = { static void enable_dev(device_t dev) { /* Set the operations if it is a special bus type */ - if (dev->path.type == DEVICE_PATH_PCI_DOMAIN) { + if (dev->path.type == DEVICE_PATH_DOMAIN) { dev->ops = &pci_domain_ops; } else if (dev->path.type == DEVICE_PATH_APIC_CLUSTER) { dev->ops = &cpu_bus_ops; diff --git a/src/northbridge/intel/i82810/northbridge.c b/src/northbridge/intel/i82810/northbridge.c index ed9876fa3d..40d8df8678 100644 --- a/src/northbridge/intel/i82810/northbridge.c +++ b/src/northbridge/intel/i82810/northbridge.c @@ -160,7 +160,7 @@ static struct device_operations cpu_bus_ops = { static void enable_dev(struct device *dev) { /* Set the operations if it is a special bus type */ - if (dev->path.type == DEVICE_PATH_PCI_DOMAIN) { + if (dev->path.type == DEVICE_PATH_DOMAIN) { dev->ops = &pci_domain_ops; pci_set_method(dev); } else if (dev->path.type == DEVICE_PATH_APIC_CLUSTER) { diff --git a/src/northbridge/intel/i82830/northbridge.c b/src/northbridge/intel/i82830/northbridge.c index f2505bd4c1..194bacbb14 100644 --- a/src/northbridge/intel/i82830/northbridge.c +++ b/src/northbridge/intel/i82830/northbridge.c @@ -129,7 +129,7 @@ static void enable_dev(struct device *dev) struct device_path; /* Set the operations if it is a special bus type. */ - if (dev->path.type == DEVICE_PATH_PCI_DOMAIN) { + if (dev->path.type == DEVICE_PATH_DOMAIN) { dev->ops = &pci_domain_ops; pci_set_method(dev); } else if (dev->path.type == DEVICE_PATH_APIC_CLUSTER) { diff --git a/src/northbridge/intel/i855/northbridge.c b/src/northbridge/intel/i855/northbridge.c index b1e150f9bb..68fefcae04 100644 --- a/src/northbridge/intel/i855/northbridge.c +++ b/src/northbridge/intel/i855/northbridge.c @@ -144,7 +144,7 @@ static struct device_operations cpu_bus_ops = { static void enable_dev(struct device *dev) { /* Set the operations if it is a special bus type */ - if (dev->path.type == DEVICE_PATH_PCI_DOMAIN) { + if (dev->path.type == DEVICE_PATH_DOMAIN) { dev->ops = &pci_domain_ops; pci_set_method(dev); } diff --git a/src/northbridge/intel/i945/northbridge.c b/src/northbridge/intel/i945/northbridge.c index c6c93e540a..ab5048e9d7 100644 --- a/src/northbridge/intel/i945/northbridge.c +++ b/src/northbridge/intel/i945/northbridge.c @@ -305,7 +305,7 @@ static struct device_operations cpu_bus_ops = { static void enable_dev(device_t dev) { /* Set the operations if it is a special bus type */ - if (dev->path.type == DEVICE_PATH_PCI_DOMAIN) { + if (dev->path.type == DEVICE_PATH_DOMAIN) { dev->ops = &pci_domain_ops; } else if (dev->path.type == DEVICE_PATH_APIC_CLUSTER) { dev->ops = &cpu_bus_ops; diff --git a/src/northbridge/intel/sandybridge/northbridge.c b/src/northbridge/intel/sandybridge/northbridge.c index 8652838add..0f5492dd60 100644 --- a/src/northbridge/intel/sandybridge/northbridge.c +++ b/src/northbridge/intel/sandybridge/northbridge.c @@ -501,7 +501,7 @@ static struct device_operations cpu_bus_ops = { static void enable_dev(device_t dev) { /* Set the operations if it is a special bus type */ - if (dev->path.type == DEVICE_PATH_PCI_DOMAIN) { + if (dev->path.type == DEVICE_PATH_DOMAIN) { dev->ops = &pci_domain_ops; } else if (dev->path.type == DEVICE_PATH_APIC_CLUSTER) { dev->ops = &cpu_bus_ops; diff --git a/src/northbridge/intel/sch/northbridge.c b/src/northbridge/intel/sch/northbridge.c index fe5881c8b3..33a74b5a1a 100644 --- a/src/northbridge/intel/sch/northbridge.c +++ b/src/northbridge/intel/sch/northbridge.c @@ -323,7 +323,7 @@ static struct device_operations cpu_bus_ops = { static void enable_dev(device_t dev) { /* Set the operations if it is a special bus type. */ - if (dev->path.type == DEVICE_PATH_PCI_DOMAIN) { + if (dev->path.type == DEVICE_PATH_DOMAIN) { dev->ops = &pci_domain_ops; } else if (dev->path.type == DEVICE_PATH_APIC_CLUSTER) { dev->ops = &cpu_bus_ops; diff --git a/src/northbridge/rdc/r8610/northbridge.c b/src/northbridge/rdc/r8610/northbridge.c index ebcccff7b4..622b056c5d 100644 --- a/src/northbridge/rdc/r8610/northbridge.c +++ b/src/northbridge/rdc/r8610/northbridge.c @@ -121,7 +121,7 @@ static struct device_operations pci_domain_ops = { static void enable_dev(struct device *dev) { /* Set the operations if it is a special bus type */ - if (dev->path.type == DEVICE_PATH_PCI_DOMAIN) { + if (dev->path.type == DEVICE_PATH_DOMAIN) { dev->ops = &pci_domain_ops; pci_set_method(dev); } diff --git a/src/northbridge/via/cn400/northbridge.c b/src/northbridge/via/cn400/northbridge.c index ab9f08445b..d126596ca5 100644 --- a/src/northbridge/via/cn400/northbridge.c +++ b/src/northbridge/via/cn400/northbridge.c @@ -265,7 +265,7 @@ static void enable_dev(struct device *dev) printk(BIOS_SPEW, "CN400: enable_dev for device %s.\n", dev_path(dev)); /* Set the operations if it is a special bus type. */ - if (dev->path.type == DEVICE_PATH_PCI_DOMAIN) { + if (dev->path.type == DEVICE_PATH_DOMAIN) { dev->ops = &pci_domain_ops; pci_set_method(dev); } else if (dev->path.type == DEVICE_PATH_APIC_CLUSTER) { diff --git a/src/northbridge/via/cn700/northbridge.c b/src/northbridge/via/cn700/northbridge.c index 86c11a8d55..ec038e0695 100644 --- a/src/northbridge/via/cn700/northbridge.c +++ b/src/northbridge/via/cn700/northbridge.c @@ -185,7 +185,7 @@ static void enable_dev(struct device *dev) printk(BIOS_SPEW, "In cn700 enable_dev for device %s.\n", dev_path(dev)); /* Set the operations if it is a special bus type. */ - if (dev->path.type == DEVICE_PATH_PCI_DOMAIN) { + if (dev->path.type == DEVICE_PATH_DOMAIN) { dev->ops = &pci_domain_ops; pci_set_method(dev); } else if (dev->path.type == DEVICE_PATH_APIC_CLUSTER) { diff --git a/src/northbridge/via/cx700/northbridge.c b/src/northbridge/via/cx700/northbridge.c index ce5edf8cb8..b1e9140697 100644 --- a/src/northbridge/via/cx700/northbridge.c +++ b/src/northbridge/via/cx700/northbridge.c @@ -115,7 +115,7 @@ static struct device_operations cpu_bus_ops = { static void enable_dev(struct device *dev) { /* Our wonderful device model */ - if (dev->path.type == DEVICE_PATH_PCI_DOMAIN) { + if (dev->path.type == DEVICE_PATH_DOMAIN) { dev->ops = &pci_domain_ops; pci_set_method(dev); } else if (dev->path.type == DEVICE_PATH_APIC_CLUSTER) { diff --git a/src/northbridge/via/vt8601/northbridge.c b/src/northbridge/via/vt8601/northbridge.c index 950d6838a2..1c699ee336 100644 --- a/src/northbridge/via/vt8601/northbridge.c +++ b/src/northbridge/via/vt8601/northbridge.c @@ -129,7 +129,7 @@ static struct device_operations cpu_bus_ops = { static void enable_dev(struct device *dev) { /* Set the operations if it is a special bus type */ - if (dev->path.type == DEVICE_PATH_PCI_DOMAIN) { + if (dev->path.type == DEVICE_PATH_DOMAIN) { dev->ops = &pci_domain_ops; pci_set_method(dev); } diff --git a/src/northbridge/via/vt8623/northbridge.c b/src/northbridge/via/vt8623/northbridge.c index e061155587..782583d949 100644 --- a/src/northbridge/via/vt8623/northbridge.c +++ b/src/northbridge/via/vt8623/northbridge.c @@ -191,7 +191,7 @@ static void enable_dev(struct device *dev) printk(BIOS_SPEW, "In vt8623 enable_dev for device %s.\n", dev_path(dev)); /* Set the operations if it is a special bus type */ - if (dev->path.type == DEVICE_PATH_PCI_DOMAIN) { + if (dev->path.type == DEVICE_PATH_DOMAIN) { dev->ops = &pci_domain_ops; pci_set_method(dev); } diff --git a/src/northbridge/via/vx800/northbridge.c b/src/northbridge/via/vx800/northbridge.c index 4e0a36dae0..1a438b02ec 100644 --- a/src/northbridge/via/vx800/northbridge.c +++ b/src/northbridge/via/vx800/northbridge.c @@ -163,7 +163,7 @@ static void enable_dev(struct device *dev) printk(BIOS_SPEW, "In VX800 enable_dev for device %s.\n", dev_path(dev)); /* Set the operations if it is a special bus type */ - if (dev->path.type == DEVICE_PATH_PCI_DOMAIN) { + if (dev->path.type == DEVICE_PATH_DOMAIN) { dev->ops = &pci_domain_ops; pci_set_method(dev); } else if (dev->path.type == DEVICE_PATH_APIC_CLUSTER) { diff --git a/src/southbridge/nvidia/ck804/pci.c b/src/southbridge/nvidia/ck804/pci.c index c29ed100f6..51fb7cd261 100644 --- a/src/southbridge/nvidia/ck804/pci.c +++ b/src/southbridge/nvidia/ck804/pci.c @@ -52,7 +52,7 @@ static void pci_init(struct device *dev) pci_domain_dev = dev->bus->dev; while (pci_domain_dev) { - if (pci_domain_dev->path.type == DEVICE_PATH_PCI_DOMAIN) + if (pci_domain_dev->path.type == DEVICE_PATH_DOMAIN) break; pci_domain_dev = pci_domain_dev->bus->dev; } diff --git a/src/southbridge/nvidia/mcp55/pci.c b/src/southbridge/nvidia/mcp55/pci.c index 2ea7daf3de..d2700d17da 100644 --- a/src/southbridge/nvidia/mcp55/pci.c +++ b/src/southbridge/nvidia/mcp55/pci.c @@ -58,7 +58,7 @@ static void pci_init(struct device *dev) pci_domain_dev = dev->bus->dev; while (pci_domain_dev) { - if (pci_domain_dev->path.type == DEVICE_PATH_PCI_DOMAIN) + if (pci_domain_dev->path.type == DEVICE_PATH_DOMAIN) break; pci_domain_dev = pci_domain_dev->bus->dev; } |