diff options
| author | Nick Vaccaro <nvaccaro@google.com> | 2018-08-09 16:05:15 -0700 |
|---|---|---|
| committer | Patrick Georgi <pgeorgi@google.com> | 2018-08-13 12:22:27 +0000 |
| commit | 4cb8ac234bc92e6b126c869948593409702d9607 (patch) | |
| tree | 67e00c190212289ff41a93708de3f0c135400870 /src | |
| parent | 2dd7b6b2f9432141e182738f8f779016aaa805b5 (diff) | |
| download | coreboot-4cb8ac234bc92e6b126c869948593409702d9607.tar.xz | |
mb/google/poppy/variants/nocturne: remove icc_max overrides
Remove icc_max overrides to allow SoC code to set proper
icc_max based on CPU SKU.
BUG=b:78122599
BRANCH=none
TEST='emerge-nocturne coreboot chromeos-bootimage', flash to
nocturne, boot to kernel and verify device doesn't hang after
a few minutes.
Change-Id: I37c44e2428b802d754f2b12b8a57601d257e6582
Signed-off-by: Nick Vaccaro <nvaccaro@google.com>
Reviewed-on: https://review.coreboot.org/27996
Reviewed-by: Caveh Jalali <caveh@google.com>
Reviewed-by: Lijian Zhao <lijian.zhao@intel.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src')
| -rw-r--r-- | src/mainboard/google/poppy/variants/nocturne/devicetree.cb | 6 |
1 files changed, 1 insertions, 5 deletions
diff --git a/src/mainboard/google/poppy/variants/nocturne/devicetree.cb b/src/mainboard/google/poppy/variants/nocturne/devicetree.cb index 9d9c5aeec9..2c074e90db 100644 --- a/src/mainboard/google/poppy/variants/nocturne/devicetree.cb +++ b/src/mainboard/google/poppy/variants/nocturne/devicetree.cb @@ -87,7 +87,7 @@ chip soc/intel/skylake #| Psi4Enable | 1 | 1 | 1 | 1 | #| ImonSlope | 0 | 0 | 0 | 0 | #| ImonOffset | 0 | 0 | 0 | 0 | - #| IccMax | 4A | 28A | 24A | 24A | + #| IccMax | Set by SoC code per CPU SKU | #| VrVoltageLimit | 1.52V | 1.52V | 1.52V | 1.52V | #| AcLoadline | 14.9 | 4 | 5.7 | 4.57 | #| DcLoadline | 14.2 | 4 | 4.2 | 4.3 | @@ -101,7 +101,6 @@ chip soc/intel/skylake .psi4enable = 1, .imon_slope = 0x0, .imon_offset = 0x0, - .icc_max = VR_CFG_AMP(4), .voltage_limit = 1520, .ac_loadline = 1490, .dc_loadline = 1420, @@ -116,7 +115,6 @@ chip soc/intel/skylake .psi4enable = 1, .imon_slope = 0x0, .imon_offset = 0x0, - .icc_max = VR_CFG_AMP(28), .voltage_limit = 1520, .ac_loadline = 400, .dc_loadline = 400, @@ -131,7 +129,6 @@ chip soc/intel/skylake .psi4enable = 1, .imon_slope = 0x0, .imon_offset = 0x0, - .icc_max = VR_CFG_AMP(24), .voltage_limit = 1520, .ac_loadline = 570, .dc_loadline = 420, @@ -146,7 +143,6 @@ chip soc/intel/skylake .psi4enable = 1, .imon_slope = 0x0, .imon_offset = 0x0, - .icc_max = VR_CFG_AMP(24), .voltage_limit = 1520, .ac_loadline = 457, .dc_loadline = 430, |