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| author | Michael Niewöhner <foss@mniewoehner.de> | 2020-04-29 14:50:49 +0200 |
|---|---|---|
| committer | Patrick Georgi <pgeorgi@google.com> | 2020-05-02 17:02:58 +0000 |
| commit | 5687c98f756bfb8621e8297c3d1eee1d7be515cb (patch) | |
| tree | aa3333b3adaad68f2db883fd899e64dedd971a8a /src | |
| parent | 8bd784eba5376eed3ad07c147096dc379ffbd187 (diff) | |
| download | coreboot-5687c98f756bfb8621e8297c3d1eee1d7be515cb.tar.xz | |
mb/supermicro/x11: drop DeepSx config from devicetree
Drop the DeepSx config as it's unsupported and disabled for the boards.
Change-Id: I91cd15b26a41f376561630cf45ffa192745eae84
Signed-off-by: Michael Niewöhner <foss@mniewoehner.de>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/40858
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Patrick Georgi <pgeorgi@google.com>
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Diffstat (limited to 'src')
| -rw-r--r-- | src/mainboard/supermicro/x11-lga1151-series/devicetree.cb | 1 |
1 files changed, 0 insertions, 1 deletions
diff --git a/src/mainboard/supermicro/x11-lga1151-series/devicetree.cb b/src/mainboard/supermicro/x11-lga1151-series/devicetree.cb index 998f3dd366..0dd37eeafa 100644 --- a/src/mainboard/supermicro/x11-lga1151-series/devicetree.cb +++ b/src/mainboard/supermicro/x11-lga1151-series/devicetree.cb @@ -2,7 +2,6 @@ chip soc/intel/skylake register "deep_s5_enable_ac" = "0" register "deep_s5_enable_dc" = "0" - register "deep_sx_config" = "DSX_EN_LAN_WAKE_PIN" # Enable "Intel Speed Shift Technology" register "speed_shift_enable" = "1" |