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authorMaxim Polyakov <max.senia.poliak@gmail.com>2019-08-22 13:11:32 +0300
committerPatrick Georgi <pgeorgi@google.com>2019-09-06 15:32:33 +0000
commit571d07d45b51d1b20af29cad27390b83b82f0aba (patch)
tree58736ae41333c3b732d20ebfcb549a551b3a803e /src
parentaa771cb19f0ff1b02ac2e9732312b34bd2b2f0b3 (diff)
downloadcoreboot-571d07d45b51d1b20af29cad27390b83b82f0aba.tar.xz
soc/intel/skylake: Add Lewisburg family PCH support
This patch adds Lewisburg C62x Series PCH support by adding the Production and Super SKUs of the following PCI devices: - LPC or eSPI Controllers, - PCI Express Root Ports, - SSATA and SATA Controllers, - SMBus, - SPI Controller, - ME/HECI, - Audio, - P2SB, - Power Management Controller. These changes are in accordance with the documentation: [*] page 39, Intel(R) C620 Series Chipset Platform Controller Hub (PCH) Datasheet, May 2019. Document Number: 336067-007US Change-Id: I7eaf2c1bb725ffed66f86c023c415ad17fe5793d Signed-off-by: Maxim Polyakov <max.senia.poliak@gmail.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/35030 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Lance Zhao <lance.zhao@gmail.com>
Diffstat (limited to 'src')
-rw-r--r--src/include/device/pci_ids.h86
-rw-r--r--src/soc/intel/common/block/cse/cse.c2
-rw-r--r--src/soc/intel/common/block/hda/hda.c2
-rw-r--r--src/soc/intel/common/block/lpc/lpc.c13
-rw-r--r--src/soc/intel/common/block/p2sb/p2sb.c2
-rw-r--r--src/soc/intel/common/block/pcie/pcie.c40
-rw-r--r--src/soc/intel/common/block/pmc/pmc.c2
-rw-r--r--src/soc/intel/common/block/sata/sata.c12
-rw-r--r--src/soc/intel/common/block/smbus/smbus.c3
-rw-r--r--src/soc/intel/common/block/spi/spi.c2
-rw-r--r--src/soc/intel/common/block/xhci/xhci.c2
-rw-r--r--src/soc/intel/skylake/bootblock/report_platform.c13
12 files changed, 177 insertions, 2 deletions
diff --git a/src/include/device/pci_ids.h b/src/include/device/pci_ids.h
index 4df616af09..905618cb66 100644
--- a/src/include/device/pci_ids.h
+++ b/src/include/device/pci_ids.h
@@ -2714,6 +2714,19 @@
#define PCI_DEVICE_ID_INTEL_SPT_H_HM175 0xa152
#define PCI_DEVICE_ID_INTEL_SPT_H_QM175 0xa153
#define PCI_DEVICE_ID_INTEL_SPT_H_CM238 0xa154
+#define PCI_DEVICE_ID_INTEL_LWB_C621 0xa1c1
+#define PCI_DEVICE_ID_INTEL_LWB_C622 0xa1c2
+#define PCI_DEVICE_ID_INTEL_LWB_C624 0xa1c3
+#define PCI_DEVICE_ID_INTEL_LWB_C625 0xa1c4
+#define PCI_DEVICE_ID_INTEL_LWB_C626 0xa1c5
+#define PCI_DEVICE_ID_INTEL_LWB_C627 0xa1c6
+#define PCI_DEVICE_ID_INTEL_LWB_C628 0xa1c7
+#define PCI_DEVICE_ID_INTEL_LWB_C629 0xa1ca
+#define PCI_DEVICE_ID_INTEL_LWB_C624_SUPER 0xa242
+#define PCI_DEVICE_ID_INTEL_LWB_C627_SUPER_1 0xa243
+#define PCI_DEVICE_ID_INTEL_LWB_C621_SUPER 0xa244
+#define PCI_DEVICE_ID_INTEL_LWB_C627_SUPER_2 0xa245
+#define PCI_DEVICE_ID_INTEL_LWB_C628_SUPER 0xa246
#define PCI_DEVICE_ID_INTEL_KBP_H_H270 0xa2c4
#define PCI_DEVICE_ID_INTEL_KBP_H_Z270 0xa2c5
#define PCI_DEVICE_ID_INTEL_KBP_H_Q270 0xa2c6
@@ -2789,6 +2802,48 @@
#define PCI_DEVICE_ID_INTEL_SPT_H_PCIE_RP19 0xa169
#define PCI_DEVICE_ID_INTEL_SPT_H_PCIE_RP20 0xa16a
+#define PCI_DEVICE_ID_INTEL_LWB_PCIE_RP1 0xa190
+#define PCI_DEVICE_ID_INTEL_LWB_PCIE_RP2 0xa191
+#define PCI_DEVICE_ID_INTEL_LWB_PCIE_RP3 0xa192
+#define PCI_DEVICE_ID_INTEL_LWB_PCIE_RP4 0xa193
+#define PCI_DEVICE_ID_INTEL_LWB_PCIE_RP5 0xa194
+#define PCI_DEVICE_ID_INTEL_LWB_PCIE_RP6 0xa195
+#define PCI_DEVICE_ID_INTEL_LWB_PCIE_RP7 0xa196
+#define PCI_DEVICE_ID_INTEL_LWB_PCIE_RP8 0xa197
+#define PCI_DEVICE_ID_INTEL_LWB_PCIE_RP9 0xa198
+#define PCI_DEVICE_ID_INTEL_LWB_PCIE_RP10 0xa199
+#define PCI_DEVICE_ID_INTEL_LWB_PCIE_RP11 0xa19a
+#define PCI_DEVICE_ID_INTEL_LWB_PCIE_RP12 0xa19b
+#define PCI_DEVICE_ID_INTEL_LWB_PCIE_RP13 0xa19c
+#define PCI_DEVICE_ID_INTEL_LWB_PCIE_RP14 0xa19d
+#define PCI_DEVICE_ID_INTEL_LWB_PCIE_RP15 0xa19e
+#define PCI_DEVICE_ID_INTEL_LWB_PCIE_RP16 0xa19f
+#define PCI_DEVICE_ID_INTEL_LWB_PCIE_RP17 0xa1e7
+#define PCI_DEVICE_ID_INTEL_LWB_PCIE_RP18 0xa1e8
+#define PCI_DEVICE_ID_INTEL_LWB_PCIE_RP19 0xa1e9
+#define PCI_DEVICE_ID_INTEL_LWB_PCIE_RP20 0xa1ea
+
+#define PCI_DEVICE_ID_INTEL_LWB_PCIE_RP1_SUPER 0xa210
+#define PCI_DEVICE_ID_INTEL_LWB_PCIE_RP2_SUPER 0xa211
+#define PCI_DEVICE_ID_INTEL_LWB_PCIE_RP3_SUPER 0xa212
+#define PCI_DEVICE_ID_INTEL_LWB_PCIE_RP4_SUPER 0xa213
+#define PCI_DEVICE_ID_INTEL_LWB_PCIE_RP5_SUPER 0xa214
+#define PCI_DEVICE_ID_INTEL_LWB_PCIE_RP6_SUPER 0xa215
+#define PCI_DEVICE_ID_INTEL_LWB_PCIE_RP7_SUPER 0xa216
+#define PCI_DEVICE_ID_INTEL_LWB_PCIE_RP8_SUPER 0xa217
+#define PCI_DEVICE_ID_INTEL_LWB_PCIE_RP9_SUPER 0xa218
+#define PCI_DEVICE_ID_INTEL_LWB_PCIE_RP10_SUPER 0xa219
+#define PCI_DEVICE_ID_INTEL_LWB_PCIE_RP11_SUPER 0xa21a
+#define PCI_DEVICE_ID_INTEL_LWB_PCIE_RP12_SUPER 0xa21b
+#define PCI_DEVICE_ID_INTEL_LWB_PCIE_RP13_SUPER 0xa21c
+#define PCI_DEVICE_ID_INTEL_LWB_PCIE_RP14_SUPER 0xa21d
+#define PCI_DEVICE_ID_INTEL_LWB_PCIE_RP15_SUPER 0xa21e
+#define PCI_DEVICE_ID_INTEL_LWB_PCIE_RP16_SUPER 0xa21f
+#define PCI_DEVICE_ID_INTEL_LWB_PCIE_RP17_SUPER 0xa267
+#define PCI_DEVICE_ID_INTEL_LWB_PCIE_RP18_SUPER 0xa268
+#define PCI_DEVICE_ID_INTEL_LWB_PCIE_RP19_SUPER 0xa269
+#define PCI_DEVICE_ID_INTEL_LWB_PCIE_RP20_SUPER 0xa26a
+
#define PCI_DEVICE_ID_INTEL_KBP_H_PCIE_RP1 0xa290
#define PCI_DEVICE_ID_INTEL_KBP_H_PCIE_RP2 0xa291
#define PCI_DEVICE_ID_INTEL_KBP_H_PCIE_RP3 0xa292
@@ -2893,6 +2948,18 @@
#define PCI_DEVICE_ID_INTEL_SPT_U_SATA 0x9d03
#define PCI_DEVICE_ID_INTEL_SPT_U_Y_PREMIUM_SATA 0x9d07
#define PCI_DEVICE_ID_INTEL_SPT_KBL_SATA 0x282a
+#define PCI_DEVICE_ID_INTEL_LWB_SATA_AHCI 0xa182
+#define PCI_DEVICE_ID_INTEL_LWB_SATA_RAID 0xa186
+#define PCI_DEVICE_ID_INTEL_LWB_SSATA_AHCI 0xa1d2
+#define PCI_DEVICE_ID_INTEL_LWB_SSATA_RAID 0xa1d6
+#define PCI_DEVICE_ID_INTEL_LWB_SATA_ALT 0x2822
+#define PCI_DEVICE_ID_INTEL_LWB_SATA_ALT_RST 0x2826
+#define PCI_DEVICE_ID_INTEL_LWB_SATA_AHCI_SUPER 0xa202
+#define PCI_DEVICE_ID_INTEL_LWB_SATA_RAID_SUPER 0xa206
+#define PCI_DEVICE_ID_INTEL_LWB_SSATA_AHCI_SUPER 0xa252
+#define PCI_DEVICE_ID_INTEL_LWB_SSATA_RAID_SUPER 0xa256
+#define PCI_DEVICE_ID_INTEL_LWB_SSATA_ALT 0x2823
+#define PCI_DEVICE_ID_INTEL_LWB_SSATA_ALT_RST 0x2827
#define PCI_DEVICE_ID_INTEL_APL_SATA 0x5ae0
#define PCI_DEVICE_ID_INTEL_GLK_SATA 0x31e3
#define PCI_DEVICE_ID_INTEL_CNL_SATA 0x9dd5
@@ -2908,6 +2975,8 @@
/* Intel PMC device Ids */
#define PCI_DEVICE_ID_INTEL_SPT_LP_PMC 0x9d21
#define PCI_DEVICE_ID_INTEL_SPT_H_PMC 0xa121
+#define PCI_DEVICE_ID_INTEL_LWB_PMC 0xa1a1
+#define PCI_DEVICE_ID_INTEL_LWB_PMC_SUPER 0xa221
#define PCI_DEVICE_ID_INTEL_KBP_H_PMC 0xa2a1
#define PCI_DEVICE_ID_INTEL_APL_PMC 0x5a94
#define PCI_DEVICE_ID_INTEL_GLK_PMC 0x3194
@@ -3012,6 +3081,8 @@
#define PCI_DEVICE_ID_INTEL_CNL_SPI1 0x9dab
#define PCI_DEVICE_ID_INTEL_CNL_SPI2 0x9dfb
#define PCI_DEVICE_ID_INTEL_CNL_HWSEQ_SPI 0x9da4
+#define PCI_DEVICE_ID_INTEL_LWB_SPI 0xa1a4
+#define PCI_DEVICE_ID_INTEL_LWB_SPI_SUPER 0xa224
#define PCI_DEVICE_ID_INTEL_CNP_H_SPI0 0xa32a
#define PCI_DEVICE_ID_INTEL_CNP_H_SPI1 0xa32b
#define PCI_DEVICE_ID_INTEL_CNP_H_SPI2 0xa37b
@@ -3151,7 +3222,8 @@
/* Intel SMBUS device Ids */
#define PCI_DEVICE_ID_INTEL_SPT_LP_SMBUS 0x9d23
#define PCI_DEVICE_ID_INTEL_SPT_H_SMBUS 0xa123
-#define PCI_DEVICE_ID_INTEL_KBP_H_SMBUS 0xa1a3
+#define PCI_DEVICE_ID_INTEL_KBP_H_LWB_SMBUS 0xa1a3
+#define PCI_DEVICE_ID_INTEL_LWB_SMBUS_SUPER 0xa223
#define PCI_DEVICE_ID_INTEL_CNL_SMBUS 0x9da3
#define PCI_DEVICE_ID_INTEL_CNP_H_SMBUS 0xa323
#define PCI_DEVICE_ID_INTEL_ICP_LP_SMBUS 0x34a3
@@ -3162,6 +3234,8 @@
#define PCI_DEVICE_ID_INTEL_GLK_XHCI 0x31a8
#define PCI_DEVICE_ID_INTEL_SPT_LP_XHCI 0x9d2f
#define PCI_DEVICE_ID_INTEL_SPT_H_XHCI 0xa12f
+#define PCI_DEVICE_ID_INTEL_LWB_XHCI 0xa1af
+#define PCI_DEVICE_ID_INTEL_LWB_XHCI_SUPER 0xa22f
#define PCI_DEVICE_ID_INTEL_KBP_H_XHCI 0xa2af
#define PCI_DEVICE_ID_INTEL_CNL_LP_XHCI 0x9ded
#define PCI_DEVICE_ID_INTEL_CNP_H_XHCI 0xa36d
@@ -3171,6 +3245,8 @@
/* Intel P2SB device Ids */
#define PCI_DEVICE_ID_INTEL_APL_P2SB 0x5a92
#define PCI_DEVICE_ID_INTEL_GLK_P2SB 0x3192
+#define PCI_DEVICE_ID_INTEL_LWB_P2SB 0xa1a0
+#define PCI_DEVICE_ID_INTEL_LWB_P2SB_SUPER 0xa220
#define PCI_DEVICE_ID_INTEL_CNL_P2SB 0x9da0
#define PCI_DEVICE_ID_INTEL_CNP_H_P2SB 0xa320
#define PCI_DEVICE_ID_INTEL_ICL_P2SB 0x34a0
@@ -3190,6 +3266,8 @@
#define PCI_DEVICE_ID_INTEL_CNL_AUDIO 0x9dc8
#define PCI_DEVICE_ID_INTEL_SKL_AUDIO 0x9d70
#define PCI_DEVICE_ID_INTEL_SKL_H_AUDIO 0xa171
+#define PCI_DEVICE_ID_INTEL_LWB_AUDIO 0xa1f0
+#define PCI_DEVICE_ID_INTEL_LWB_AUDIO_SUPER 0xa270
#define PCI_DEVICE_ID_INTEL_KBL_AUDIO 0x9d71
#define PCI_DEVICE_ID_INTEL_CNP_H_AUDIO 0xa348
#define PCI_DEVICE_ID_INTEL_ICL_AUDIO 0x34c8
@@ -3201,6 +3279,12 @@
#define PCI_DEVICE_ID_INTEL_GLK_CSE0 0x319a
#define PCI_DEVICE_ID_INTEL_CNL_CSE0 0x9de0
#define PCI_DEVICE_ID_INTEL_SKL_CSE0 0x9d3a
+#define PCI_DEVICE_ID_INTEL_LWB_CSE0 0xa1ba
+#define PCI_DEVICE_ID_INTEL_LWB_CSE1 0xa1bb
+#define PCI_DEVICE_ID_INTEL_LWB_CSE2 0xa1be
+#define PCI_DEVICE_ID_INTEL_LWB_CSE0_SUPER 0xa23a
+#define PCI_DEVICE_ID_INTEL_LWB_CSE1_SUPER 0xa23b
+#define PCI_DEVICE_ID_INTEL_LWB_CSE2_SUPER 0xa23e
#define PCI_DEVICE_ID_INTEL_CNP_H_CSE0 0xa360
#define PCI_DEVICE_ID_INTEL_ICL_CSE0 0x34e0
#define PCI_DEVICE_ID_INTEL_CMP_CSE0 0x02e0
diff --git a/src/soc/intel/common/block/cse/cse.c b/src/soc/intel/common/block/cse/cse.c
index 7bd46ceba9..446c5ac4ba 100644
--- a/src/soc/intel/common/block/cse/cse.c
+++ b/src/soc/intel/common/block/cse/cse.c
@@ -515,6 +515,8 @@ static const unsigned short pci_device_ids[] = {
PCI_DEVICE_ID_INTEL_GLK_CSE0,
PCI_DEVICE_ID_INTEL_CNL_CSE0,
PCI_DEVICE_ID_INTEL_SKL_CSE0,
+ PCI_DEVICE_ID_INTEL_LWB_CSE0,
+ PCI_DEVICE_ID_INTEL_LWB_CSE0_SUPER,
PCI_DEVICE_ID_INTEL_CNP_H_CSE0,
PCI_DEVICE_ID_INTEL_ICL_CSE0,
PCI_DEVICE_ID_INTEL_CMP_CSE0,
diff --git a/src/soc/intel/common/block/hda/hda.c b/src/soc/intel/common/block/hda/hda.c
index 8ab835e577..96d26d47ab 100644
--- a/src/soc/intel/common/block/hda/hda.c
+++ b/src/soc/intel/common/block/hda/hda.c
@@ -75,6 +75,8 @@ static struct device_operations hda_ops = {
static const unsigned short pci_device_ids[] = {
PCI_DEVICE_ID_INTEL_SKL_AUDIO,
PCI_DEVICE_ID_INTEL_SKL_H_AUDIO,
+ PCI_DEVICE_ID_INTEL_LWB_AUDIO,
+ PCI_DEVICE_ID_INTEL_LWB_AUDIO_SUPER,
PCI_DEVICE_ID_INTEL_KBL_AUDIO,
PCI_DEVICE_ID_INTEL_CNL_AUDIO,
PCI_DEVICE_ID_INTEL_CNP_H_AUDIO,
diff --git a/src/soc/intel/common/block/lpc/lpc.c b/src/soc/intel/common/block/lpc/lpc.c
index d7917d6262..46dfd7ff57 100644
--- a/src/soc/intel/common/block/lpc/lpc.c
+++ b/src/soc/intel/common/block/lpc/lpc.c
@@ -138,6 +138,19 @@ static const unsigned short pci_device_ids[] = {
PCI_DEVICE_ID_INTEL_SPT_H_HM175,
PCI_DEVICE_ID_INTEL_SPT_H_QM175,
PCI_DEVICE_ID_INTEL_SPT_H_CM238,
+ PCI_DEVICE_ID_INTEL_LWB_C621,
+ PCI_DEVICE_ID_INTEL_LWB_C622,
+ PCI_DEVICE_ID_INTEL_LWB_C624,
+ PCI_DEVICE_ID_INTEL_LWB_C625,
+ PCI_DEVICE_ID_INTEL_LWB_C626,
+ PCI_DEVICE_ID_INTEL_LWB_C627,
+ PCI_DEVICE_ID_INTEL_LWB_C628,
+ PCI_DEVICE_ID_INTEL_LWB_C629,
+ PCI_DEVICE_ID_INTEL_LWB_C624_SUPER,
+ PCI_DEVICE_ID_INTEL_LWB_C627_SUPER_1,
+ PCI_DEVICE_ID_INTEL_LWB_C621_SUPER,
+ PCI_DEVICE_ID_INTEL_LWB_C627_SUPER_2,
+ PCI_DEVICE_ID_INTEL_LWB_C628_SUPER,
PCI_DEVICE_ID_INTEL_KBP_H_Q270,
PCI_DEVICE_ID_INTEL_KBP_H_H270,
PCI_DEVICE_ID_INTEL_KBP_H_Z270,
diff --git a/src/soc/intel/common/block/p2sb/p2sb.c b/src/soc/intel/common/block/p2sb/p2sb.c
index 24cde1b6c9..1df05679dd 100644
--- a/src/soc/intel/common/block/p2sb/p2sb.c
+++ b/src/soc/intel/common/block/p2sb/p2sb.c
@@ -168,6 +168,8 @@ static const struct device_operations device_ops = {
static const unsigned short pci_device_ids[] = {
PCI_DEVICE_ID_INTEL_APL_P2SB,
PCI_DEVICE_ID_INTEL_GLK_P2SB,
+ PCI_DEVICE_ID_INTEL_LWB_P2SB,
+ PCI_DEVICE_ID_INTEL_LWB_P2SB_SUPER,
PCI_DEVICE_ID_INTEL_CNL_P2SB,
PCI_DEVICE_ID_INTEL_CNP_H_P2SB,
PCI_DEVICE_ID_INTEL_ICL_P2SB,
diff --git a/src/soc/intel/common/block/pcie/pcie.c b/src/soc/intel/common/block/pcie/pcie.c
index e8b1050f4a..94fa63122e 100644
--- a/src/soc/intel/common/block/pcie/pcie.c
+++ b/src/soc/intel/common/block/pcie/pcie.c
@@ -113,6 +113,46 @@ static const unsigned short pcie_device_ids[] = {
PCI_DEVICE_ID_INTEL_SPT_H_PCIE_RP18,
PCI_DEVICE_ID_INTEL_SPT_H_PCIE_RP19,
PCI_DEVICE_ID_INTEL_SPT_H_PCIE_RP20,
+ PCI_DEVICE_ID_INTEL_LWB_PCIE_RP1,
+ PCI_DEVICE_ID_INTEL_LWB_PCIE_RP2,
+ PCI_DEVICE_ID_INTEL_LWB_PCIE_RP3,
+ PCI_DEVICE_ID_INTEL_LWB_PCIE_RP4,
+ PCI_DEVICE_ID_INTEL_LWB_PCIE_RP5,
+ PCI_DEVICE_ID_INTEL_LWB_PCIE_RP6,
+ PCI_DEVICE_ID_INTEL_LWB_PCIE_RP7,
+ PCI_DEVICE_ID_INTEL_LWB_PCIE_RP8,
+ PCI_DEVICE_ID_INTEL_LWB_PCIE_RP9,
+ PCI_DEVICE_ID_INTEL_LWB_PCIE_RP10,
+ PCI_DEVICE_ID_INTEL_LWB_PCIE_RP11,
+ PCI_DEVICE_ID_INTEL_LWB_PCIE_RP12,
+ PCI_DEVICE_ID_INTEL_LWB_PCIE_RP13,
+ PCI_DEVICE_ID_INTEL_LWB_PCIE_RP14,
+ PCI_DEVICE_ID_INTEL_LWB_PCIE_RP15,
+ PCI_DEVICE_ID_INTEL_LWB_PCIE_RP16,
+ PCI_DEVICE_ID_INTEL_LWB_PCIE_RP17,
+ PCI_DEVICE_ID_INTEL_LWB_PCIE_RP18,
+ PCI_DEVICE_ID_INTEL_LWB_PCIE_RP19,
+ PCI_DEVICE_ID_INTEL_LWB_PCIE_RP20,
+ PCI_DEVICE_ID_INTEL_LWB_PCIE_RP1_SUPER,
+ PCI_DEVICE_ID_INTEL_LWB_PCIE_RP2_SUPER,
+ PCI_DEVICE_ID_INTEL_LWB_PCIE_RP3_SUPER,
+ PCI_DEVICE_ID_INTEL_LWB_PCIE_RP4_SUPER,
+ PCI_DEVICE_ID_INTEL_LWB_PCIE_RP5_SUPER,
+ PCI_DEVICE_ID_INTEL_LWB_PCIE_RP6_SUPER,
+ PCI_DEVICE_ID_INTEL_LWB_PCIE_RP7_SUPER,
+ PCI_DEVICE_ID_INTEL_LWB_PCIE_RP8_SUPER,
+ PCI_DEVICE_ID_INTEL_LWB_PCIE_RP9_SUPER,
+ PCI_DEVICE_ID_INTEL_LWB_PCIE_RP10_SUPER,
+ PCI_DEVICE_ID_INTEL_LWB_PCIE_RP11_SUPER,
+ PCI_DEVICE_ID_INTEL_LWB_PCIE_RP12_SUPER,
+ PCI_DEVICE_ID_INTEL_LWB_PCIE_RP13_SUPER,
+ PCI_DEVICE_ID_INTEL_LWB_PCIE_RP14_SUPER,
+ PCI_DEVICE_ID_INTEL_LWB_PCIE_RP15_SUPER,
+ PCI_DEVICE_ID_INTEL_LWB_PCIE_RP16_SUPER,
+ PCI_DEVICE_ID_INTEL_LWB_PCIE_RP17_SUPER,
+ PCI_DEVICE_ID_INTEL_LWB_PCIE_RP18_SUPER,
+ PCI_DEVICE_ID_INTEL_LWB_PCIE_RP19_SUPER,
+ PCI_DEVICE_ID_INTEL_LWB_PCIE_RP20_SUPER,
PCI_DEVICE_ID_INTEL_KBP_H_PCIE_RP1,
PCI_DEVICE_ID_INTEL_KBP_H_PCIE_RP2,
PCI_DEVICE_ID_INTEL_KBP_H_PCIE_RP3,
diff --git a/src/soc/intel/common/block/pmc/pmc.c b/src/soc/intel/common/block/pmc/pmc.c
index eaaf1252ea..f6f0983227 100644
--- a/src/soc/intel/common/block/pmc/pmc.c
+++ b/src/soc/intel/common/block/pmc/pmc.c
@@ -125,6 +125,8 @@ static struct device_operations device_ops = {
static const unsigned short pci_device_ids[] = {
PCI_DEVICE_ID_INTEL_SPT_LP_PMC,
PCI_DEVICE_ID_INTEL_SPT_H_PMC,
+ PCI_DEVICE_ID_INTEL_LWB_PMC,
+ PCI_DEVICE_ID_INTEL_LWB_PMC_SUPER,
PCI_DEVICE_ID_INTEL_KBP_H_PMC,
PCI_DEVICE_ID_INTEL_APL_PMC,
PCI_DEVICE_ID_INTEL_GLK_PMC,
diff --git a/src/soc/intel/common/block/sata/sata.c b/src/soc/intel/common/block/sata/sata.c
index 7dacc6ed92..0c278f37f2 100644
--- a/src/soc/intel/common/block/sata/sata.c
+++ b/src/soc/intel/common/block/sata/sata.c
@@ -75,6 +75,18 @@ static const unsigned short pci_device_ids[] = {
PCI_DEVICE_ID_INTEL_SPT_U_SATA,
PCI_DEVICE_ID_INTEL_SPT_U_Y_PREMIUM_SATA,
PCI_DEVICE_ID_INTEL_SPT_KBL_SATA,
+ PCI_DEVICE_ID_INTEL_LWB_SATA_AHCI,
+ PCI_DEVICE_ID_INTEL_LWB_SSATA_AHCI,
+ PCI_DEVICE_ID_INTEL_LWB_SATA_RAID,
+ PCI_DEVICE_ID_INTEL_LWB_SSATA_RAID,
+ PCI_DEVICE_ID_INTEL_LWB_SATA_AHCI_SUPER,
+ PCI_DEVICE_ID_INTEL_LWB_SSATA_AHCI_SUPER,
+ PCI_DEVICE_ID_INTEL_LWB_SATA_RAID_SUPER,
+ PCI_DEVICE_ID_INTEL_LWB_SSATA_RAID_SUPER,
+ PCI_DEVICE_ID_INTEL_LWB_SATA_ALT,
+ PCI_DEVICE_ID_INTEL_LWB_SATA_ALT_RST,
+ PCI_DEVICE_ID_INTEL_LWB_SSATA_ALT,
+ PCI_DEVICE_ID_INTEL_LWB_SSATA_ALT_RST,
PCI_DEVICE_ID_INTEL_CNL_SATA,
PCI_DEVICE_ID_INTEL_CNL_PREMIUM_SATA,
PCI_DEVICE_ID_INTEL_CNP_CMP_COMPAT_SATA,
diff --git a/src/soc/intel/common/block/smbus/smbus.c b/src/soc/intel/common/block/smbus/smbus.c
index fc2257719a..700d2b7b5f 100644
--- a/src/soc/intel/common/block/smbus/smbus.c
+++ b/src/soc/intel/common/block/smbus/smbus.c
@@ -92,7 +92,8 @@ static const unsigned short pci_device_ids[] = {
PCI_DEVICE_ID_INTEL_CNL_SMBUS,
PCI_DEVICE_ID_INTEL_SPT_LP_SMBUS,
PCI_DEVICE_ID_INTEL_SPT_H_SMBUS,
- PCI_DEVICE_ID_INTEL_KBP_H_SMBUS,
+ PCI_DEVICE_ID_INTEL_LWB_SMBUS_SUPER,
+ PCI_DEVICE_ID_INTEL_KBP_H_LWB_SMBUS,
PCI_DEVICE_ID_INTEL_ICP_LP_SMBUS,
PCI_DEVICE_ID_INTEL_CMP_SMBUS,
0
diff --git a/src/soc/intel/common/block/spi/spi.c b/src/soc/intel/common/block/spi/spi.c
index af5087f716..365da2faa6 100644
--- a/src/soc/intel/common/block/spi/spi.c
+++ b/src/soc/intel/common/block/spi/spi.c
@@ -71,6 +71,8 @@ static const unsigned short pci_device_ids[] = {
PCI_DEVICE_ID_INTEL_CNP_H_SPI1,
PCI_DEVICE_ID_INTEL_CNP_H_SPI2,
PCI_DEVICE_ID_INTEL_CNP_H_HWSEQ_SPI,
+ PCI_DEVICE_ID_INTEL_LWB_SPI,
+ PCI_DEVICE_ID_INTEL_LWB_SPI_SUPER,
PCI_DEVICE_ID_INTEL_ICP_SPI0,
PCI_DEVICE_ID_INTEL_ICP_SPI1,
PCI_DEVICE_ID_INTEL_ICP_SPI2,
diff --git a/src/soc/intel/common/block/xhci/xhci.c b/src/soc/intel/common/block/xhci/xhci.c
index 0bdf1d97ba..c5c5e6c6d6 100644
--- a/src/soc/intel/common/block/xhci/xhci.c
+++ b/src/soc/intel/common/block/xhci/xhci.c
@@ -125,6 +125,8 @@ static const unsigned short pci_device_ids[] = {
PCI_DEVICE_ID_INTEL_GLK_XHCI,
PCI_DEVICE_ID_INTEL_SPT_LP_XHCI,
PCI_DEVICE_ID_INTEL_SPT_H_XHCI,
+ PCI_DEVICE_ID_INTEL_LWB_XHCI,
+ PCI_DEVICE_ID_INTEL_LWB_XHCI_SUPER,
PCI_DEVICE_ID_INTEL_KBP_H_XHCI,
PCI_DEVICE_ID_INTEL_CNP_H_XHCI,
PCI_DEVICE_ID_INTEL_ICP_LP_XHCI,
diff --git a/src/soc/intel/skylake/bootblock/report_platform.c b/src/soc/intel/skylake/bootblock/report_platform.c
index 1e65d9acae..fcfd874c8f 100644
--- a/src/soc/intel/skylake/bootblock/report_platform.c
+++ b/src/soc/intel/skylake/bootblock/report_platform.c
@@ -86,6 +86,19 @@ static struct {
{ PCI_DEVICE_ID_INTEL_SPT_H_HM175, "Skylake PCH-H HM175" },
{ PCI_DEVICE_ID_INTEL_SPT_H_QM175, "Skylake PCH-H QM175" },
{ PCI_DEVICE_ID_INTEL_SPT_H_CM238, "Skylake PCH-H CM238" },
+ { PCI_DEVICE_ID_INTEL_LWB_C621, "Lewisburg PCH C621" },
+ { PCI_DEVICE_ID_INTEL_LWB_C622, "Lewisburg PCH C622" },
+ { PCI_DEVICE_ID_INTEL_LWB_C624, "Lewisburg PCH C624" },
+ { PCI_DEVICE_ID_INTEL_LWB_C625, "Lewisburg PCH C625" },
+ { PCI_DEVICE_ID_INTEL_LWB_C626, "Lewisburg PCH C626" },
+ { PCI_DEVICE_ID_INTEL_LWB_C627, "Lewisburg PCH C627" },
+ { PCI_DEVICE_ID_INTEL_LWB_C628, "Lewisburg PCH C628" },
+ { PCI_DEVICE_ID_INTEL_LWB_C629, "Lewisburg PCH C629" },
+ { PCI_DEVICE_ID_INTEL_LWB_C624_SUPER, "Lewisburg PCH C624 Super SKU" },
+ { PCI_DEVICE_ID_INTEL_LWB_C627_SUPER_1, "Lewisburg PCH C627 Super SKU" },
+ { PCI_DEVICE_ID_INTEL_LWB_C621_SUPER, "Lewisburg PCH C621 Super SKU" },
+ { PCI_DEVICE_ID_INTEL_LWB_C627_SUPER_2, "Lewisburg PCH C627 Super SKU" },
+ { PCI_DEVICE_ID_INTEL_LWB_C628_SUPER, "Lewisburg PCH C628 Super SKU" },
{ PCI_DEVICE_ID_INTEL_KBP_H_Q270, "Kabylake-H Q270" },
{ PCI_DEVICE_ID_INTEL_KBP_H_H270, "Kabylake-H H270" },
{ PCI_DEVICE_ID_INTEL_KBP_H_Z270, "Kabylake-H Z270" },