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authorRonak Kanabar <ronak.kanabar@intel.com>2020-05-27 11:25:45 +0530
committerPatrick Georgi <pgeorgi@google.com>2020-05-28 09:50:09 +0000
commit69589294c205b616e80cafbbfb0b33e105a75386 (patch)
tree768a3eb5137fbd0e222ea38535e3740442f6bc78 /src
parent316c180c413d08713795c7ae943b84d799deedfd (diff)
downloadcoreboot-69589294c205b616e80cafbbfb0b33e105a75386.tar.xz
soc/intel/jasperlake: Disable PAVP UPD
This patch will disable PAVP UPD, which is by default enabled in FSP. BUG=b:155595624 BRANCH=None TEST=Build, boot JSLRVP, Verified UPD values from FSP log Change-Id: I8e103ad11ae6ffa6b9efe4bf249bbe344bc10a30 Signed-off-by: Ronak Kanabar <ronak.kanabar@intel.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/41763 Reviewed-by: Karthik Ramasubramanian <kramasub@google.com> Reviewed-by: Justin TerAvest <teravest@chromium.org> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src')
-rw-r--r--src/soc/intel/jasperlake/fsp_params.c3
1 files changed, 3 insertions, 0 deletions
diff --git a/src/soc/intel/jasperlake/fsp_params.c b/src/soc/intel/jasperlake/fsp_params.c
index eafc374584..75e1c64513 100644
--- a/src/soc/intel/jasperlake/fsp_params.c
+++ b/src/soc/intel/jasperlake/fsp_params.c
@@ -210,6 +210,9 @@ void platform_fsp_silicon_init_params_cb(FSPS_UPD *supd)
params->XdciEnable = 0;
}
+ /* Disable Pavp */
+ params->PavpEnable = 0;
+
/* Provide correct UART number for FSP debug logs */
params->SerialIoDebugUartNumber = CONFIG_UART_FOR_CONSOLE;