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authorElyes HAOUAS <ehaouas@noos.fr>2018-12-27 17:46:25 +0100
committerFelix Held <felix-coreboot@felixheld.de>2018-12-29 14:03:07 +0000
commit8e9921178d86077b6edac21676f9da251173416b (patch)
tree978bc22fbff5a44c41545d5e37e99d0ca2cd6d0d /src
parent94bb9a9f5f30ec8893173a72080090d1c04d2a73 (diff)
downloadcoreboot-8e9921178d86077b6edac21676f9da251173416b.tar.xz
mb/google/glados/variants/caroline/devicetree.cb: Remove unneeded white spaces
Change-Id: I7fdf8934187d2786fdac23ed4460147867c25044 Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr> Reviewed-on: https://review.coreboot.org/c/30460 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Felix Held <felix-coreboot@felixheld.de>
Diffstat (limited to 'src')
-rw-r--r--src/mainboard/google/glados/variants/caroline/devicetree.cb14
1 files changed, 7 insertions, 7 deletions
diff --git a/src/mainboard/google/glados/variants/caroline/devicetree.cb b/src/mainboard/google/glados/variants/caroline/devicetree.cb
index 0c3c8617ac..8caf8fde2e 100644
--- a/src/mainboard/google/glados/variants/caroline/devicetree.cb
+++ b/src/mainboard/google/glados/variants/caroline/devicetree.cb
@@ -153,16 +153,16 @@ chip soc/intel/skylake
register "PcieRpClkReqNumber[0]" = "1"
register "usb2_ports[0]" = "USB2_PORT_MID(OC_SKIP)" # Type-C Port (main)
- register "usb2_ports[1]" = "USB2_PORT_MAX(OC_SKIP)" # Type-C Port (sub)
- register "usb2_ports[2]" = "USB2_PORT_MID(OC_SKIP)" # Bluetooth
- register "usb2_ports[4]" = "USB2_PORT_EMPTY" # Empty
- register "usb2_ports[6]" = "USB2_PORT_FLEX(OC_SKIP)" # Camera
- register "usb2_ports[8]" = "USB2_PORT_EMPTY" # Empty
+ register "usb2_ports[1]" = "USB2_PORT_MAX(OC_SKIP)" # Type-C Port (sub)
+ register "usb2_ports[2]" = "USB2_PORT_MID(OC_SKIP)" # Bluetooth
+ register "usb2_ports[4]" = "USB2_PORT_EMPTY" # Empty
+ register "usb2_ports[6]" = "USB2_PORT_FLEX(OC_SKIP)" # Camera
+ register "usb2_ports[8]" = "USB2_PORT_EMPTY" # Empty
register "usb3_ports[0]" = "USB3_PORT_DEFAULT(OC_SKIP)" # Type-C Port (main)
register "usb3_ports[1]" = "USB3_PORT_DEFAULT(OC_SKIP)" # Type-C Port (sub)
- register "usb3_ports[2]" = "USB3_PORT_EMPTY" # Empty
- register "usb3_ports[3]" = "USB3_PORT_EMPTY" # Empty
+ register "usb3_ports[2]" = "USB3_PORT_EMPTY" # Empty
+ register "usb3_ports[3]" = "USB3_PORT_EMPTY" # Empty
# Must leave UART0 enabled or SD/eMMC will not work as PCI
register "SerialIoDevMode" = "{