diff options
| author | jiazi Yang <Tomato_Yang@asus.com> | 2015-11-09 14:07:31 +0800 |
|---|---|---|
| committer | Patrick Georgi <pgeorgi@google.com> | 2015-11-20 18:21:36 +0100 |
| commit | 9c6d2b8f4cb4c02a7557787e308fb999bf6a115a (patch) | |
| tree | 0aa8fafa6e0e1694353c2a7aa7554750ac9a64b9 /src | |
| parent | 21deb06b32572007ceecce39b043f7ce9e78d229 (diff) | |
| download | coreboot-9c6d2b8f4cb4c02a7557787e308fb999bf6a115a.tar.xz | |
google/veyron_mickey: Update LPDDR3 configuration
This makes the same changes to the LPDDR3 configuration that
were made for Samsung modules:
- Enable ODT function
- Change DS to 40 from 34.3
BUG=chrome-os-partner:47416
BRANCH=firmware-veyron-6588.B
TEST=Boot on mickey elpida board
Change-Id: If8c729188803dd854dbbe80539fb228636b5eb9f
Signed-off-by: Patrick Georgi <pgeorgi@chromium.org>
Original-Commit-Id: b3eb8bc31b9727b67a6b53b4370315010d9d6379
Original-Change-Id: I2d54d3087ecd3536469866f30e4eb2d8b1acd5c1
Original-Signed-off-by: jiazi Yang <Tomato_Yang@asus.com>
Original-Reviewed-on: https://chromium-review.googlesource.com/311153
Original-Reviewed-by: Julius Werner <jwerner@chromium.org>
Original-Reviewed-on: https://chromium-review.googlesource.com/311855
Original-Commit-Ready: David Hendricks <dhendrix@chromium.org>
Original-Tested-by: David Hendricks <dhendrix@chromium.org>
Original-Reviewed-by: David Hendricks <dhendrix@chromium.org>
Reviewed-on: http://review.coreboot.org/12484
Tested-by: build bot (Jenkins)
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
Diffstat (limited to 'src')
5 files changed, 15 insertions, 10 deletions
diff --git a/src/mainboard/google/veyron_mickey/sdram_inf/sdram-lpddr3-elpida-2GB.inc b/src/mainboard/google/veyron_mickey/sdram_inf/sdram-lpddr3-elpida-2GB.inc index ef82b27781..cb92d34571 100644 --- a/src/mainboard/google/veyron_mickey/sdram_inf/sdram-lpddr3-elpida-2GB.inc +++ b/src/mainboard/google/veyron_mickey/sdram_inf/sdram-lpddr3-elpida-2GB.inc @@ -65,7 +65,8 @@ .mr[0] = 0x0, .mr[1] = 0xC3, .mr[2] = 0x6, - .mr[3] = 0x1 + /* 40 Ohms instead of 34.3 due to bad PCB routing on Mickey. */ + .mr[3] = 0x2 }, .noc_timing = 0x20D266A4, .noc_activate = 0x5B6, @@ -74,5 +75,5 @@ .dramtype = LPDDR3, .num_channels = 2, .stride = 9, - .odt = 0 + .odt = 1 }, diff --git a/src/mainboard/google/veyron_mickey/sdram_inf/sdram-lpddr3-elpida-4GB.inc b/src/mainboard/google/veyron_mickey/sdram_inf/sdram-lpddr3-elpida-4GB.inc index e071646bf4..c2293d5621 100644 --- a/src/mainboard/google/veyron_mickey/sdram_inf/sdram-lpddr3-elpida-4GB.inc +++ b/src/mainboard/google/veyron_mickey/sdram_inf/sdram-lpddr3-elpida-4GB.inc @@ -65,7 +65,8 @@ .mr[0] = 0x0, .mr[1] = 0xC3, .mr[2] = 0x6, - .mr[3] = 0x1 + /* 40 Ohms instead of 34.3 due to bad PCB routing on Mickey. */ + .mr[3] = 0x2 }, .noc_timing = 0x20D266A4, .noc_activate = 0x5B6, @@ -74,5 +75,5 @@ .dramtype = LPDDR3, .num_channels = 2, .stride = 13, - .odt = 0 + .odt = 1 }, diff --git a/src/mainboard/google/veyron_mickey/sdram_inf/sdram-lpddr3-hynix-2GB.inc b/src/mainboard/google/veyron_mickey/sdram_inf/sdram-lpddr3-hynix-2GB.inc index 00dc549161..857365293b 100644 --- a/src/mainboard/google/veyron_mickey/sdram_inf/sdram-lpddr3-hynix-2GB.inc +++ b/src/mainboard/google/veyron_mickey/sdram_inf/sdram-lpddr3-hynix-2GB.inc @@ -65,7 +65,8 @@ .mr[0] = 0x0, .mr[1] = 0xC3, .mr[2] = 0x6, - .mr[3] = 0x1 + /* 40 Ohms instead of 34.3 due to bad PCB routing on Mickey. */ + .mr[3] = 0x2 }, .noc_timing = 0x20D266A4, .noc_activate = 0x5B6, @@ -74,5 +75,5 @@ .dramtype = LPDDR3, .num_channels = 2, .stride = 9, - .odt = 0, + .odt = 1, }, diff --git a/src/mainboard/google/veyron_mickey/sdram_inf/sdram-lpddr3-hynix-4GB.inc b/src/mainboard/google/veyron_mickey/sdram_inf/sdram-lpddr3-hynix-4GB.inc index a48ac42a0e..57dca32179 100644 --- a/src/mainboard/google/veyron_mickey/sdram_inf/sdram-lpddr3-hynix-4GB.inc +++ b/src/mainboard/google/veyron_mickey/sdram_inf/sdram-lpddr3-hynix-4GB.inc @@ -64,7 +64,8 @@ .mr[0] = 0x0, .mr[1] = 0xC3, .mr[2] = 0x6, - .mr[3] = 0x1 + /* 40 Ohms instead of 34.3 due to bad PCB routing on Mickey. */ + .mr[3] = 0x2 }, .noc_timing = 0x20D266A4, .noc_activate = 0x5B6, @@ -73,5 +74,5 @@ .dramtype = LPDDR3, .num_channels = 2, .stride = 13, - .odt = 0, + .odt = 1, }, diff --git a/src/mainboard/google/veyron_mickey/sdram_inf/sdram-lpddr3-samsung-4GB.inc b/src/mainboard/google/veyron_mickey/sdram_inf/sdram-lpddr3-samsung-4GB.inc index 09d260bc23..c3e8fe4ab4 100644 --- a/src/mainboard/google/veyron_mickey/sdram_inf/sdram-lpddr3-samsung-4GB.inc +++ b/src/mainboard/google/veyron_mickey/sdram_inf/sdram-lpddr3-samsung-4GB.inc @@ -64,7 +64,8 @@ .mr[0] = 0x0, .mr[1] = 0xC3, .mr[2] = 0x6, - .mr[3] = 0x1 + /* 40 Ohms instead of 34.3 due to bad PCB routing on Mickey. */ + .mr[3] = 0x2 }, .noc_timing = 0x20D266A4, .noc_activate = 0x5B6, @@ -73,5 +74,5 @@ .dramtype = LPDDR3, .num_channels = 2, .stride = 13, - .odt = 0, + .odt = 1, }, |