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author | Edward O'Callaghan <eocallaghan@alterapraxis.com> | 2014-08-01 20:29:40 +1000 |
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committer | Edward O'Callaghan <eocallaghan@alterapraxis.com> | 2014-08-24 14:03:12 +0200 |
commit | 9f2dae4ec0a420ef76a3672dbda29d104b9da4ff (patch) | |
tree | b9ef86876defdd00dc57b883f0c55ff2ab06d2f3 /src | |
parent | a51064eb1a7eb04accbc371f37fd80ea851ab7e4 (diff) | |
download | coreboot-9f2dae4ec0a420ef76a3672dbda29d104b9da4ff.tar.xz |
lenovo/t530: Use GPIO defines specified in bd82x6x/pch.h header
Use defines of offsets rather than hard coded values.
Change-Id: Id2471cd22aa402d74163473e48f86af9789cdaa7
Signed-off-by: Edward O'Callaghan <eocallaghan@alterapraxis.com>
Reviewed-on: http://review.coreboot.org/6435
Tested-by: build bot (Jenkins)
Reviewed-by: Vladimir Serbinenko <phcoder@gmail.com>
Diffstat (limited to 'src')
-rw-r--r-- | src/mainboard/lenovo/t530/romstage.c | 20 |
1 files changed, 10 insertions, 10 deletions
diff --git a/src/mainboard/lenovo/t530/romstage.c b/src/mainboard/lenovo/t530/romstage.c index bb4c0a5484..3be1869bc6 100644 --- a/src/mainboard/lenovo/t530/romstage.c +++ b/src/mainboard/lenovo/t530/romstage.c @@ -183,16 +183,16 @@ void main(unsigned long bist) pci_write_config8(PCH_LPC_DEV, GPIO_CNTL, 0x10); // setup_pch_gpios(&t530_gpio_map); - outl(0x3962a5ff, DEFAULT_GPIOBASE); - outl(0x8ebf6aff, DEFAULT_GPIOBASE + 4); - outl(0x66917ebb, DEFAULT_GPIOBASE + 0xc); - outl(0x00002002, DEFAULT_GPIOBASE + 0x2c); - outl(0x02ff08fe, DEFAULT_GPIOBASE + 0x30); - outl(0x1f47f7fd, DEFAULT_GPIOBASE + 0x34); - outl(0xffbeff43, DEFAULT_GPIOBASE + 0x38); - outl(0x000000ff, DEFAULT_GPIOBASE + 0x40); - outl(0x00000fff, DEFAULT_GPIOBASE + 0x44); - outl(0x00000f4f, DEFAULT_GPIOBASE + 0x48); + outl(0x3962a5ff, DEFAULT_GPIOBASE + GPIO_USE_SEL); + outl(0x8ebf6aff, DEFAULT_GPIOBASE + GP_IO_SEL); + outl(0x66917ebb, DEFAULT_GPIOBASE + GP_LVL); + outl(0x00002002, DEFAULT_GPIOBASE + GPI_INV); + outl(0x02ff08fe, DEFAULT_GPIOBASE + GPIO_USE_SEL2); + outl(0x1f47f7fd, DEFAULT_GPIOBASE + GP_IO_SEL2); + outl(0xffbeff43, DEFAULT_GPIOBASE + GP_LVL2); + outl(0x000000ff, DEFAULT_GPIOBASE + GPIO_USE_SEL3); + outl(0x00000fff, DEFAULT_GPIOBASE + GP_IO_SEL3); + outl(0x00000f4f, DEFAULT_GPIOBASE + GP_LVL3); /* Initialize console device(s) */ console_init(); |