diff options
| author | Jumin Li <jumin.li@mediatek.com> | 2018-09-20 17:40:45 +0800 |
|---|---|---|
| committer | Patrick Georgi <pgeorgi@google.com> | 2018-10-17 12:05:39 +0000 |
| commit | b2c136d9601b6a8a93a2214018df1961a8c2c75c (patch) | |
| tree | 070ef3a78a55a2cc60a5f499d741c4f8c89828f8 /src | |
| parent | 223434644a67c6934652819bac3eb3e1bc0d9b6f (diff) | |
| download | coreboot-b2c136d9601b6a8a93a2214018df1961a8c2c75c.tar.xz | |
mediatek/mt8183: Add USB support
This patch implements SoC-specific defines of mt8183 and links the
common code to support USB.
BUG=b:80501386
BRANCH=none
TEST=Boots correctly on Kukui
Change-Id: I1224cf24f92b07f3c1814f1cbfef96aafa5a992b
Signed-off-by: Jumin Li <jumin.li@mediatek.com>
Reviewed-on: https://review.coreboot.org/28787
Reviewed-by: Julius Werner <jwerner@chromium.org>
Reviewed-by: Joel Kitching <kitching@google.com>
Reviewed-by: Hung-Te Lin <hungte@chromium.org>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src')
| -rw-r--r-- | src/soc/mediatek/mt8183/Makefile.inc | 1 | ||||
| -rw-r--r-- | src/soc/mediatek/mt8183/include/soc/addressmap.h | 3 | ||||
| -rw-r--r-- | src/soc/mediatek/mt8183/include/soc/usb.h | 37 |
3 files changed, 41 insertions, 0 deletions
diff --git a/src/soc/mediatek/mt8183/Makefile.inc b/src/soc/mediatek/mt8183/Makefile.inc index 8fece7969c..c5e8120007 100644 --- a/src/soc/mediatek/mt8183/Makefile.inc +++ b/src/soc/mediatek/mt8183/Makefile.inc @@ -36,6 +36,7 @@ ramstage-y += soc.c ramstage-$(CONFIG_SPI_FLASH) += ../common/spi.c spi.c ramstage-y += ../common/timer.c ramstage-$(CONFIG_DRIVERS_UART) += ../common/uart.c +ramstage-y += ../common/usb.c ramstage-y += ../common/wdt.c CPPFLAGS_common += -Isrc/soc/mediatek/mt8183/include diff --git a/src/soc/mediatek/mt8183/include/soc/addressmap.h b/src/soc/mediatek/mt8183/include/soc/addressmap.h index de7eb1f1cb..5527e6e981 100644 --- a/src/soc/mediatek/mt8183/include/soc/addressmap.h +++ b/src/soc/mediatek/mt8183/include/soc/addressmap.h @@ -37,6 +37,8 @@ enum { SPI3_BASE = IO_PHYS + 0x01013000, SPI4_BASE = IO_PHYS + 0x01014000, SPI5_BASE = IO_PHYS + 0x01015000, + SSUSB_MAC_BASE = IO_PHYS + 0x01200000, + SSUSB_IPPC_BASE = IO_PHYS + 0x01203e00, IOCFG_RT_BASE = IO_PHYS + 0x01C50000, IOCFG_RM_BASE = IO_PHYS + 0x01D20000, IOCFG_RB_BASE = IO_PHYS + 0x01D30000, @@ -45,6 +47,7 @@ enum { IOCFG_BL_BASE = IO_PHYS + 0x01E90000, IOCFG_LT_BASE = IO_PHYS + 0x01F20000, IOCFG_TL_BASE = IO_PHYS + 0x01F30000, + SSUSB_SIF_BASE = IO_PHYS + 0x01F40300, SMI_BASE = IO_PHYS + 0x04019000, }; diff --git a/src/soc/mediatek/mt8183/include/soc/usb.h b/src/soc/mediatek/mt8183/include/soc/usb.h new file mode 100644 index 0000000000..57d4e7810d --- /dev/null +++ b/src/soc/mediatek/mt8183/include/soc/usb.h @@ -0,0 +1,37 @@ +/* + * This file is part of the coreboot project. + * + * Copyright 2018 MediaTek Inc. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; version 2 of the License. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + */ + +#ifndef SOC_MEDIATEK_MT8183_USB_H +#define SOC_MEDIATEK_MT8183_USB_H + +#include <soc/usb_common.h> + +struct ssusb_sif_port { + struct sif_u2_phy_com u2phy; + u32 reserved0[64*5]; + struct sif_u3phyd u3phyd; + u32 reserved1[64]; + struct sif_u3phya u3phya; + struct sif_u3phya_da u3phya_da; + u32 reserved2[64 * 3]; +}; +check_member(ssusb_sif_port, u3phyd, 0x600); +check_member(ssusb_sif_port, u3phya, 0x800); +check_member(ssusb_sif_port, u3phya_da, 0x900); +check_member(ssusb_sif_port, reserved2, 0xa00); + +#define USB_PORT_NUMBER 1 + +#endif |