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| author | Michael Niewöhner <foss@mniewoehner.de> | 2019-11-02 12:14:06 +0100 |
|---|---|---|
| committer | Patrick Georgi <pgeorgi@google.com> | 2019-11-11 10:26:03 +0000 |
| commit | b4d960b65aa126d4534189672322ec62dcd87bde (patch) | |
| tree | e74f0d24e098b2f7ba1dbb15d3098aa762585425 /src | |
| parent | 28552095d8a4eee588923a11c3f3921a2492b140 (diff) | |
| download | coreboot-b4d960b65aa126d4534189672322ec62dcd87bde.tar.xz | |
soc/intel/apollolake: add soc implementation for ETR address API
Add soc implementation for the new ETR address API.
Change-Id: I1832f5f14055fc3dbb502289035130ca7a5d6d33
Signed-off-by: Michael Niewöhner <foss@mniewoehner.de>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/36566
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Diffstat (limited to 'src')
| -rw-r--r-- | src/soc/intel/apollolake/pmutil.c | 5 |
1 files changed, 5 insertions, 0 deletions
diff --git a/src/soc/intel/apollolake/pmutil.c b/src/soc/intel/apollolake/pmutil.c index 23e9732e91..559adad405 100644 --- a/src/soc/intel/apollolake/pmutil.c +++ b/src/soc/intel/apollolake/pmutil.c @@ -49,6 +49,11 @@ uintptr_t soc_read_pmc_base(void) return read_pmc_mmio_bar(); } +uint32_t *soc_pmc_etr_addr(void) +{ + return (uint32_t *)(soc_read_pmc_base() + ETR); +} + const char *const *soc_smi_sts_array(size_t *a) { static const char *const smi_sts_bits[] = { |