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authorCaveh Jalali <caveh@chromium.org>2020-07-24 23:14:34 -0700
committerPatrick Georgi <pgeorgi@google.com>2020-07-28 19:18:03 +0000
commitc04654d9ce6add9347cfa6e3ae086808f38a9f7b (patch)
treedcbbf3db25f5a076d70e0c6f01794281f9fc5235 /src
parentae010c619f3965214eb8a9cdae483cf36909f279 (diff)
downloadcoreboot-c04654d9ce6add9347cfa6e3ae086808f38a9f7b.tar.xz
mb/google/volteer2: Add support for passive USB-C daughterboard
This copies over the USB daughterboard device tree config from volteer to volteer2. These two boards are basically identical in this area so the config should also be identical. BUG=b:158673460 TEST=none Change-Id: If8a82bc18b36d92a1c851b49612edfbefa18ec54 Signed-off-by: Caveh Jalali <caveh@chromium.org> Reviewed-on: https://review.coreboot.org/c/coreboot/+/43849 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Angel Pons <th3fanbus@gmail.com> Reviewed-by: Tim Wawrzynczak <twawrzynczak@chromium.org>
Diffstat (limited to 'src')
-rw-r--r--src/mainboard/google/volteer/variants/volteer2/overridetree.cb15
1 files changed, 14 insertions, 1 deletions
diff --git a/src/mainboard/google/volteer/variants/volteer2/overridetree.cb b/src/mainboard/google/volteer/variants/volteer2/overridetree.cb
index 9c78b94c90..8e5985ea2f 100644
--- a/src/mainboard/google/volteer/variants/volteer2/overridetree.cb
+++ b/src/mainboard/google/volteer/variants/volteer2/overridetree.cb
@@ -169,7 +169,20 @@ chip soc/intel/tigerlake
register "usb3_port_number" = "2"
# SBU is fixed, HSL follows CC
register "sbu_orientation" = "TYPEC_ORIENTATION_NORMAL"
- device generic 1 on end
+ device generic 1 on
+ probe DB_USB USB4_GEN2
+ probe DB_USB USB3_ACTIVE
+ probe DB_USB USB4_GEN3
+ probe DB_USB USB3_NO_A
+ end
+ end
+ chip drivers/intel/pmc_mux/conn
+ register "usb2_port_number" = "4"
+ register "usb3_port_number" = "2"
+ # SBU & HSL follow CC
+ device generic 1 on
+ probe DB_USB USB3_PASSIVE
+ end
end
end
end